On designing OTA-C graphic-equalizers with MOSFET-triode transconductors

A CMOS audio-equalizer based on a parallel-array of 2nd-order bandpass-sections is presented and realized with triode transconductors. It has a programmable 12db-boost/cut on each of its three decade-bands, easily achieved through the linear dependence of gm on VDS. In accordance with a 0.8μm n-well double-metal fabrication process, a range of simulations supports theoretical analysis and circuit performance at different boost/cut scenarios. For VDD=3.3V, fullboosting stand-by prover consumption is 1.05mW. THD=-42.61dB@1Vpp and may be improved by balanced structures. Thermal- and I/f-noise spectral densities are 3.2μV/Hz12 and 18.2μV/Hz12@20Hz, respectively, for a dynamic range of 52.3dB@1Vpp. The equalizer effective area is 2.4mm2. The drawback of the existing transmission-zero due to the feedthrough-capacitance of a triode input-device is also addressed. The proposed topology can be extended to the design of more complex graphic-equalizers and hearing-aids.

Hybrid three-phase HPF rectifier with programmable input current THD, using FPGA device and VHDL language

In this paper is proposed and analyzed a digital hysteresis modulation using a FPGA (Field Programmable Gate Array) device and VHDL (Hardware Description Language), applied at a hybrid three-phase rectifier with almost unitary input power factor, composed by parallel SEPIC controlled single-phase rectifiers connected to each leg of a standard 6-pulses uncontrolled diode rectifier. The digital control allows a programmable THD (Total Harmonic Distortion) at the input currents, and it makes possible that the power rating of the switching-mode converters, connected in parallel, can be a small fraction of the total average output power, in order to obtain a compact converter, reduced input current THD and almost unitary input power factor. Finally, the proposed digital control, using a FPGA device and VHDL, offers an important flexibility for the associated control technique, in order to obtain a programmable PFC (Power Factor Correction) hybrid three-phase rectifier, in agreement with the international standards (IEC, and IEEE), which impose limits for the THD of the AC (Alternate Current) line input currents. The proposed strategy is verified by experiments. © 2008 IEEE.

A 2kW interleaved ZCS-FM boost rectifier digitally controlled by FPGA device

This paper presents a 2kW single-phase high power factor boost rectifier with four cells in interleave connection, operating in critical conduction mode, and employing a soft-switching technique, controlled by Field Programmable Gate Array (FPGA). The soft-switching technique Is based on zero-current-switching (ZCS) cells, providing ZC (zero-current) turn-on and ZCZV (zero-current-zero-voltage) turn-off for the active switches, and ZV (zero-voltage) turn-on and ZC (zero-current) turn-off for the boost diodes. The disadvantages related 'to reverse recovery effects of boost diodes operated in continuous conduction mode (additional losses, and electromagnetic interference (EMI) problems) are minimized, due to the operation in critical conduction mode. In addition, due to the Interleaving technique, the rectifer's features include the reduction in the input current ripple, the reduction in the output voltage ripple, the use of low stress devices, low volume for the EMI input filter, high input power factor (PF), and low total harmonic distortion (THD) In the input current, in compliance with the TEC61000-3-2 standards. The digital controller has been developed using a hardware description language (VHDL) and implemented using a XC2S200E-SpartanII-E/Xilinx FPGA device, performing a true critical conduction operation mode for four interleaved cells, and a closed-loop to provide the output voltage regulation, like as a pre-regulator rectifier. Experimental results are presented for a 2kW implemented prototype with four interleaved cells, 400V nominal output voltage and 220V(rms) nominal input voltage, in order to verify the feasibility and performance of the proposed digital control through the use of a FPGA device.

On the performance of a dual-mode non-linear vibration energy harvesting device

The research trend for harvesting energy from the ambient vibration sources has moved from using a linear resonant generator to a non-linear generator in order to improve on the performance of a linear generator; for example, the relatively small bandwidth, intolerance to mistune and the suitability of the device for low-frequency applications. This article presents experimental results to illustrate the dynamic behaviour of a dual-mode non-linear energy-harvesting device operating in hardening and bi-stable modes under harmonic excitation. The device is able to change from one mode to another by altering the negative magnetic stiffness by adjusting the separation gap between the magnets and the iron core. Results for the device operating in both modes are presented. They show that there is a larger bandwidth for the device operating in the hardening mode compared to the equivalent linear device. However, the maximum power transfer theory is less applicable for the hardening mode due to occurrence of the maximum power at different frequencies, which depends on the non-linearity and the damping in the system. The results for the bi-stable mode show that the device is insensitive to a range of excitation frequencies depending upon the input level, damping and non-linearity.

On the optimum parameters of a device for harvesting energy from running and walking

This paper investigates the feasibility of using an energy harvesting device tuned such that its natural frequency coincides with higher harmonics of the input to capture energy from walking or running human motion more efficiently. The paper starts by reviewing the concept of a linear resonant generator for a tonal frequency input and then derives an expression for the power harvested for an input with several harmonics. The amount of power harvested is estimated numerically using measured data from human subjects. Assuming that the input is periodic, the signal is reconstructed using a Fourier series before being used in the simulation. It is found that although the power output depends on the input frequency, the choice of tuning the natural frequency of the device to coincide with a particular higher harmonic is restricted by the amount of damping that is needed to maximize the amount of power harvested, as well as to comply with the size limit of the device. It is also found that it is not feasible to tune the device to match the first few harmonics when the size of the device is small, because a large amount of damping is required to limit the motion of the mass.

Hartman-Grobman decomposition when in presence of jumps in the relative degree of the dynamics in an energy harvesting device

This work deals with the nonlinear piezoelectric coupling in vibration-based energy harvesting, done by A. Triplett and D.D. Quinn in J. of Intelligent Material Syst. and Structures (2009). In that paper the first order nonlinear fundamental equation has a three dimensional state variable. Introducing both observable and control variables in such a way the controlled system became a SISO system, we can obtain as a corollary that for a particular choice of the observable variable it is possible to present an explicit functional relation between this variable one, and the variable representing the charge harvested. After-by observing that the structure in the Input-Output decomposition essentially changes depending on the relative degree changes, presenting bifurcation branches in its zero dynamics-we are able in to identify this type of bifurcation indicating its close relation with the Hartman - Grobman theorem telling about decomposition into stable and the unstable manifolds for hyperbolic points.

A phase-shifting control for variable frequency multi-cells interleaved boost pre-regulator based on FPGA device

In this paper were investigated phase-shift control strategies applied to a four cells interleaved high input-power-factor pre-regulator boost rectifier, operating in critical conduction mode, using a non-dissipative commutation cells and frequency modulation. The digital control has been developed using a hardware description language (VHDL) and implemented using the XC2S200E-SpartanII-E/Xilinx FPGA, performing a true critical conduction operation mode for a generic number of interleaved cells. Experimental results are presented, in order to verify the feasibility and performance of the proposed digital control, through the use of a Xilinx FPGA device.

An AC voltage regulator with high-power-factor, and control using a FPGA device

This paper presents the analysis, design, simulation, and experimental results for a high frequency high Power-Factor (PF) AC (Alternate Current) voltage regulator, using a Sepic converter as power stage. The control technique employed to impose a sinusoidal input current waveform, with low Total Harmonic Distortion (THD), is the sinusoidal variable hysteresis control. The control technique was implemented in a FPGA (Field Programmable Gate Array) device, using a Hardware Description Language (VHDL). Through the use of the proposed control technique, the AC voltage regulator performs active power-factor correction, and low THD in the input current, for linear and non-linear loads, satisfying the requirements of the EEC61000-3-2 standards. Experimental results from an example prototype, designed for 300W of nominal output power, 50kHz (switching frequency), and 127Vrms of nominal input and output voltages, are presented in order to validate the proposed AC regulator. © 2005 IEEE.