12 resultados para Hardware design

em Repositório Institucional UNESP - Universidade Estadual Paulista "Julio de Mesquita Filho"


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The real-time monitoring of events in an industrial plant is vital, to monitor the actual conditions of operation of the machinery responsible for the manufacturing process. A predictive maintenance program includes condition monitoring of the rotating machinery, to anticipate possible conditions of failure. To increase the operational reliability it is thus necessary an efficient tool to analyze and monitor the equipments, in real-time, and enabling the detection of e.g. incipient faults in bearings. To fulfill these requirements some innovations have become frequent, namely the inclusion of vibration sensors or stator current sensors. These innovations enable the development of new design methodologies that take into account the ease of future modifications, upgrades, and replacement of the monitored machine, as well as expansion of the monitoring system. This paper presents the development, implementation and testing of an instrument for vibration monitoring, as a possible solution to embed in industrial environment. The digital control system is based on an FPGA, and its configuration with an open hardware design tool is described. Special focus is given to the area of fault detection in rolling bearings. © 2012 IEEE.

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Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

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We have recently proposed an extension to Petri nets in order to be able to directly deal with all aspects of embedded digital systems. This extension is meant to be used as an internal model of our co-design environment. After analyzing relevant related work, and presenting a short introduction to our extension as a background material, we describe the details of the timing model we use in our approach, which is mainly based in Merlin's time model. We conclude the paper by discussing an example of its usage. © 2004 IEEE.

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Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

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This paper deals with the design of a network-on-chip reconfigurable pseudorandom number generation unit that can map and execute meta-heuristic algorithms in hardware. The unit can be configured to implement one of the following five linear generator algorithms: a multiplicative congruential, a mixed congruential, a standard multiple recursive, a mixed multiple recursive, and a multiply-with-carry. The generation unit can be used both as a pseudorandom and a message passing-based server, which is able to produce pseudorandom numbers on demand, sending them to the network-on-chip blocks that originate the service request. The generator architecture has been mapped to a field programmable gate array, and showed that millions of numbers in 32-, 64-, 96-, or 128-bit formats can be produced in tens of milliseconds. (C) 2011 Elsevier B.V. All rights reserved.

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This paper presents a tool box developed to read files describing a SIMULINK® model and translates it into a structural VHDL-AMS description. In translation process, all files and directory structures to simulate the translated model on SystemVision™ environment is generate. The tool box named MS2SV was tested by three models of commercially available digital-to-analogue converters. All models use the R2R ladder network to conversion, but the functionality of these three components is different. The methodology of conversion of the model is presents together with sort theory about R-2R ladder network. In the evaluation of the translated models, we used a sine waveform input signal and the waveform generated by D/A conversion process was compared by FFT analysis. The results show the viability of this type of approach. This work considers some of challenges set by the electronic industry for the further development of simulation methodologies and tools in the field of mixed-signal technology. © 2007 IEEE.

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The constant increase in digital systems complexity definitely demands the automation of the corresponding synthesis process. This paper presents a computational environment designed to produce both software and hardware implementations of a system. The tool for code generation has been named ACG8051. As for the hardware synthesis there has been produced a larger environment consisting of four programs, namely: PIPE2TAB, AGPS, TABELA, and TAB2VHDL. ACG8051 and PIPE2TAB use place/transition net descriptions from PIPE as inputs. ACG8051 is aimed at generating assembly code for the 8051 micro-controller. PIPE2TAB produces a tabular version of a Mealy type finite state machine of the system, its output is fed into AGPS that is used for state allocation. The resulting digital system is then input to TABELA, which minimizes control functions and outputs of the digital system. Finally, the output generated by TABELA is fed to TAB2VHDL that produces a VHDL description of the system at the register transfer level. Thus, we present here a set of tools designed to take a high-level description of a digital system, represented by a place/transition net, and produces as output both an assembly code that can be immediately run on an 8051 micro-controller, and a VHDL description that can be used to directly implement the hardware parts either on an FPGA or as an ASIC.

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The design of full programmable type-2 membership function circuit is presented in this paper. This circuit is used to implement the fuzzifier block of Type-2 Fuzzy Logic Controller chip. In this paper the type-2 fuzzy set was obtained by blurring the width of the type-1 fuzzy set. This circuit allows programming the height and the shape of the membership function. It operates in current mode, with supply voltage of 3.3V. The simulation results of interval type-2 membership function circuit have been done in CMOS 0.35μm technology using Mentor Graphics software. © 2011 IEEE.

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This paper presents an important improvement of the MS2SV tool. The MS2SV performs the translation of mixed systems developed in MATLAB / Simulink for a structural or behavioral description in VHDL-AMS. Previously, the MS2SV translated only models of the LIB MS2SV library. This improvement allows designer to create your own library to translation. As case study was used a rudder controller employed in an unmanned aerial vehicle. For comparison with the original model the VHDL-AMS code obtained by the translation was simulated in SystemVision environment. The results proved the efficiency of the tool using the translation improvement proposed in this paper.

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Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

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This work focuses basically on the design and analysis of simple and low cost hardware systems efficiency for temperature measurement in agricultural area. The main objective is to prove quantitatively, through statistical data analysis, to what extent a simple hardware designed with inexpensive components can be used safely in the indoor temperature measurement in farm buildings, such as greenhouses, warehouse or silos. To verify the of simple hardware efficiency, its data were compared with data from measurements with a high performance LabVIEW platform. This work proved that a simple hardware based on a microcontroller and the LM35 sensor can perform well. It presented a good accuracy but a relatively low precision that can be improved when performed some consecutive signal sampling and then used its average value. Although there are many papers that explain these components, this work has the distinction of presenting a data analysis in numerical form and using high performance systems to ensure critical data comparison.