Paralelização de algoritmos de trimap utilizando a arquitetura Cuda

Techniques of image combination, with extraction of objects to set a final scene, are very used in applications from photos montages to cinematographic productions. These techniques are called digital matting. With them is possible to decrease the cost of productions, because it is not necessary for the actor to be filmed in the location where the final scene occurs. This feature also favors its use in programs made to digital television, which demands a high quality image. Many digital matting algorithms use markings done on the images, to demarcate what is the foreground, the background and the uncertainty areas. This marking is called trimap, which is a triple map containing these three informations. The trimap is done, typically, from manual markings. In this project, methods were created that can be used in digital matting algorithms, with restriction of time and without human interaction, that is, the creation of an algorithm that generates the trimap automatically. This last one can be generated from the difference between a color of an arbitrary background and the foreground, or by using a depth map. It was also created a matting method, based on the Geodesic Matting (BAI; SAPIRO, 2009), which has an inferior processing time then the original one. Aiming to improve the performance of the applications that generates the trimap and of the algorithms that generates the alphamap (map that associates a value to the transparency of each pixel of the image), allowing its use in applications with time restrictions, it was used the CUDA architecture. Taking advantage, this way, of the computational power and the features of the GPGPU, which is massively parallel

Permanent Genetic Resources added to Molecular Ecology Resources Database 1 May 2009-31 July 2009

This article documents the addition of 512 microsatellite marker loci and nine pairs of Single Nucleotide Polymorphism (SNP) sequencing primers to the Molecular Ecology Resources Database. Loci were developed for the following species: Alcippe morrisonia morrisonia, Bashania fangiana, Bashania fargesii, Chaetodon vagabundus, Colletes floralis, Coluber constrictor flaviventris, Coptotermes gestroi, Crotophaga major, Cyprinella lutrensis, Danaus plexippus, Fagus grandifolia, Falco tinnunculus, Fletcherimyia fletcheri, Hydrilla verticillata, Laterallus jamaicensis coturniculus, Leavenworthia alabamica, Marmosops incanus, Miichthys miiuy, Nasua nasua, Noturus exilis, Odontesthes bonariensis, Quadrula fragosa, Pinctada maxima, Pseudaletia separata, Pseudoperonospora cubensis, Podocarpus elatus, Portunus trituberculatus, Rhagoletis cerasi, Rhinella schneideri, Sarracenia alata, Skeletonema marinoi, Sminthurus viridis, Syngnathus abaster, Uroteuthis (Photololigo) chinensis, Verticillium dahliae, Wasmannia auropunctata, and Zygochlamys patagonica. These loci were cross-tested on the following species: Chaetodon baronessa, Falco columbarius, Falco eleonorae, Falco naumanni, Falco peregrinus, Falco subbuteo, Didelphis aurita, Gracilinanus microtarsus, Marmosops paulensis, Monodelphis Americana, Odontesthes hatcheri, Podocarpus grayi, Podocarpus lawrencei, Podocarpus smithii, Portunus pelagicus, Syngnathus acus, Syngnathus typhle,Uroteuthis (Photololigo) edulis, Uroteuthis (Photololigo) duvauceli and Verticillium albo-atrum. This article also documents the addition of nine sequencing primer pairs and sixteen allele specific primers or probes for Oncorhynchus mykiss and Oncorhynchus tshawytscha; these primers and assays were cross-tested in both species.

Using GPU to exploit parallelism on cryptography

In this article we explore the NVIDIA graphical processing units (GPU) computational power in cryptography using CUDA (Compute Unified Device Architecture) technology. CUDA makes the general purpose computing easy using the parallel processing presents in GPUs. To do this, the NVIDIA GPUs architectures and CUDA are presented, besides cryptography concepts. Furthermore, we do the comparison between the versions executed in CPU with the parallel version of the cryptography algorithms Advanced Encryption Standard (AES) and Message-digest Algorithm 5 (MD5) wrote in CUDA. © 2011 AISTI.

Técnicas de paralelização em GPGPU aplicadas em algoritmo para remoção de ruído multiplicativo

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Implementação do algoritmo de treinamento do classificador Floresta de Caminhos Ótimos em GPU

Pós-graduação em Ciência da Computação - IBILCE

Paralelização automática de laços

Identify opportunities for software parallelism is a task that takes a lot of human time, but once some code patterns for parallelism are identified, a software could quickly accomplish this task. Thus, automating this process brings many benefits such as saving time and reducing errors caused by the programmer [1]. This work aims at developing a software environment that identifies opportunities for parallelism in a source code written in C language, and generates a program with the same behavior, but with higher degree of parallelism, compatible with a graphics processor compatible with CUDA architecture.

Estudo de materiais supercondutores em forma de SQUID com uma constrição usando métodos de paralelização computacional

Pós-graduação em Ciência e Tecnologia de Materiais - FC

Implementação do algoritmo de treinamento do classificador floresta de caminhos ótimos em GPU

Técnicas de reconhecimento de padrões tem como principal objetivo classificar um conjunto de amostras, sendo o processo de aprendizado a fase de maior consumo de tempo. O problema pode piorar em ferramentas de classificação interativas, o que pode ser inaceitável para grandes bases de dados. Um exemplo de classificador é o baseado em Floresta de Caminhos Ótimos [8] - OPF. Dado que muitos trabalhos tem sido orientados à implementação de algoritmos de reconhecimento de padrões em ambiente General Purpose Graphics Processing Unit - GPGPU, o presente estudo objetivou a implementação da etapa de treinamento do classificador Floresta de Caminhos Ótimos em CUDA, visando aumentar a sua eficiência. A otimização do classificador em CUDA demonstrou uma fase de treinamento mais rápida que a versão original.