58 resultados para Java.
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Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)
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A lesion nematode population infecting citrus in the state of São Paulo, Brazil is described and named Pratylenchus jaehni sp. n. Biological, molecular and morphological characteristics of this new species are compared with those of the morphologically similar P. coffeae and P. loosi. Results of mating experiments showed that R jaehni is reproductively isolated from P coffeae. Molecular (D2/D3 DNA sequences) dissimilarities among P. jaehni sp, n., P. coffeae and P. loosi were documented in a previous study. The morphology of seven R coffeae populations from tropical America and eastern Java and a P loosi population from Sri Lanka is used for comparison with the morphology of P. jaehni sp. n. Pratylenchus jaehni differs from R coffeae and P. loosi by only a few morphological ;characters of the females. The mean values of stylet length, stylet knob height, and vulva position are smaller (less than or equal to15 vs greater than or equal to15 mum, less than or equal to2.7 vs greater than or equal to2.7 mum, less than or equal to79 vs greater than or equal to79%) than those in P coffeae and P loosi. The tail terminus is usually subhemispherical and smooth in P jaehni sp. n.. whereas it is commonly truncate and indented in most P. coffeae populations and bluntly or finely pointed in P. loosi. Because of the morphological similarities among P. jaehni sp. n., P. coffeae and P. loosi, examination of at least ten specimens is required to obtain a reliable diagnosis based on morphology. Nineteen morphometric parameters for P. jaehni sp. n. and P. coffeae ranged from 0-13% smaller in fixed than in live specimens.
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IEEE 1451 Standard is intended to address the smart transducer interfacing problematic in network environments. Usually, proprietary hardware and software is a very efficient solution to in planent the IEEE 1451 normative, although can be expensive and inflexible. In contrast, the use of open and standardized tools for implementing the IEEE 1451 normative is proposed in this paper. Tools such as Java and Phyton programming languages, Linux, programmable logic technology, Personal Computer resources and Ethernet architecture were integrated in order to constructa network node based on the IEEE 1451 standards. The node can be applied in systems based on the client-server communication model The evaluation of the employed tools and expermental results are presented. © 2005 IEEE.
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A method for context-sensitive analysis of binaries that may have obfuscated procedure call and return operations is presented. Such binaries may use operators to directly manipulate stack instead of using native call and ret instructions to achieve equivalent behavior. Since definition of context-sensitivity and algorithms for context-sensitive analysis have thus far been based on the specific semantics associated to procedure call and return operations, classic interprocedural analyses cannot be used reliably for analyzing programs in which these operations cannot be discerned. A new notion of context-sensitivity is introduced that is based on the state of the stack at any instruction. While changes in 'calling'-context are associated with transfer of control, and hence can be reasoned in terms of paths in an interprocedural control flow graph (ICFG), the same is not true of changes in 'stack'-context. An abstract interpretation based framework is developed to reason about stack-contexts and to derive analogues of call-strings based methods for the context-sensitive analysis using stack-context. The method presented is used to create a context-sensitive version of Venable et al.'s algorithm for detecting obfuscated calls. Experimental results show that the context-sensitive version of the algorithm generates more precise results and is also computationally more efficient than its context-insensitive counterpart. Copyright © 2010 ACM.
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IEEE 1451 is Standard to connect transduscers through a communication network. This article describes a supervisory system implementaion according to IEEE 1451 Standard using Java. This software, named NCAP, may be used in several industrial applications, besides making feasible to obtain TEDS as a report or by Internet. NCAP communicates with transduscer module through RS232 Interface and was testes in industrial automation processes. © 2009 IEEE.
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Since Sharir and Pnueli, algorithms for context-sensitivity have been defined in terms of 'valid' paths in an interprocedural flow graph. The definition of valid paths requires atomic call and ret statements, and encapsulated procedures. Thus, the resulting algorithms are not directly applicable when behavior similar to call and ret instructions may be realized using non-atomic statements, or when procedures do not have rigid boundaries, such as with programs in low level languages like assembly or RTL. We present a framework for context-sensitive analysis that requires neither atomic call and ret instructions, nor encapsulated procedures. The framework presented decouples the transfer of control semantics and the context manipulation semantics of statements. A new definition of context-sensitivity, called stack contexts, is developed. A stack context, which is defined using trace semantics, is more general than Sharir and Pnueli's interprocedural path based calling-context. An abstract interpretation based framework is developed to reason about stack-contexts and to derive analogues of calling-context based algorithms using stack-context. The framework presented is suitable for deriving algorithms for analyzing binary programs, such as malware, that employ obfuscations with the deliberate intent of defeating automated analysis. The framework is used to create a context-sensitive version of Venable et al.'s algorithm for analyzing x86 binaries without requiring that a binary conforms to a standard compilation model for maintaining procedures, calls, and returns. Experimental results show that a context-sensitive analysis using stack-context performs just as well for programs where the use of Sharir and Pnueli's calling-context produces correct approximations. However, if those programs are transformed to use call obfuscations, a contextsensitive analysis using stack-context still provides the same, correct results and without any additional overhead. © Springer Science+Business Media, LLC 2011.
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Cryptographic systems are safe. However, the management of cryptographic keys of these systems is a tough task. They are usually protected by the use of password-based authentication mechanisms, which is a weak link on conventional cryptographic systems, as the passwords can be easily copied or stolen. The usage of a biometric approach for releasing the keys is an alternative to the password-based mechanisms. But just like passwords, we need mechanisms to keep the biometrical signal safe. One approach for such mechanism is to use biometrical key cryptography. The cryptographic systems based on the use of biometric characteristics as keys are called biometrical cryptographic systems. This article presents the implementation of Fuzzy Vault, a biometrical cryptographic system written in Java, along with its performance evaluation. Fuzzy Vault was tested on a real application using smartcards.
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This paper aims to describe the basic concepts and necessary for Java programs can invoke libraries of programming language C/C ++, through the JNA API. We used a library developed in C/C ++ called Glass [8], which offers a solution for viewing 3D graphics, using graphics clusters, reducing the cost of viewing. The purpose of the work is to interact with the humanoid developed using Java, which makes movements of LIBRAS language for the deaf, as Glass's, so that through this they can view the information using stereoscopic multi-view in full size. ©2010 IEEE.
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Software Transactional Memory (STM) systems have poor performance under high contention scenarios. Since many transactions compete for the same data, most of them are aborted, wasting processor runtime. Contention management policies are typically used to avoid that, but they are passive approaches as they wait for an abort to happen so they can take action. More proactive approaches have emerged, trying to predict when a transaction is likely to abort so its execution can be delayed. Such techniques are limited, as they do not replace the doomed transaction by another or, when they do, they rely on the operating system for that, having little or no control on which transaction should run. In this paper we propose LUTS, a Lightweight User-Level Transaction Scheduler, which is based on an execution context record mechanism. Unlike other techniques, LUTS provides the means for selecting another transaction to run in parallel, thus improving system throughput. Moreover, it avoids most of the issues caused by pseudo parallelism, as it only launches as many system-level threads as the number of available processor cores. We discuss LUTS design and present three conflict-avoidance heuristics built around LUTS scheduling capabilities. Experimental results, conducted with STMBench7 and STAMP benchmark suites, show LUTS efficiency when running high contention applications and how conflict-avoidance heuristics can improve STM performance even more. In fact, our transaction scheduling techniques are capable of improving program performance even in overloaded scenarios. © 2011 Springer-Verlag.
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This paper presents novel simulation tools to assist the lecturers about learning processes on renewable energy sources, considering photovoltaic (PV) systems. The PV behavior, functionality and its interaction with power electronic converters are investigated in the simulation tools. The main PV output characteristics, I (current) versus V (voltage) and P (power) versus V (voltage), were implemented in the tools, in order to aid the users for the design steps. In order to verify the effectiveness of the developed tools the simulation results were compared with Matlab. Finally, a prototype was implemented with the purpose to compare the experimental results with the results from the proposed tools, validating its operational feasibility. © 2011 IEEE.
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This paper presents the analysis and evaluation of the Power Electronics course at So Paulo State University-UNESP-Campus of Ilha Solteira(SP)-Brazil, which includes the usage of interactive Java simulations tools and an educational software to aid the teaching of power electronic converters. This platform serves as an oriented course for the lectures and supplementary support for laboratory experiments in the power electronics courses. The simulation tools provide an interactive and dynamic way to visualize the power electronics converters behavior together with the educational software, which contemplates the theory and a list of subjects for circuit simulations. In order to verify the performance and the effectiveness of the proposed interactive educational platform, it is presented a statistical analysis considering the last three years. © 2011 IEEE.
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This work describes a hardware/software co-design system development, named IEEE 1451 platform, to be used in process automation. This platform intends to make easier the implementation of IEEE standards 1451.0, 1451.1, 1451.2 and 1451.5. The hardware was built using NIOS II processor resources on Alteras Cyclone II FPGA. The software was done using Java technology and C/C++ for the processors programming. This HW/SW system implements the IEEE 1451 based on a control module and supervisory software for industrial automation. © 2011 Elsevier B.V.
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Synchronous generators are essential components of electric power systems. They are present both in hydro and thermal power plants, performing the function of converting mechanical into electrical energy. This paper presents a visual approach to manipulate parameters that affect operation limits of synchronous generators, using a specifically designed software. The operating characteristics of synchronous generators, for all possible modes of operation, are revised in order to link the concepts to the graphic objects. The approach matches the distance learning tool requirements and also enriches the learning process by developing student trust and understanding of the concepts involved in building synchronous machine capability curves. © 2012 IEEE.
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Software transaction memory (STM) systems have been used as an approach to improve performance, by allowing the concurrent execution of atomic blocks. However, under high-contention workloads, STM-based systems can considerably degrade performance, as transaction conflict rate increases. Contention management policies have been used as a way to select which transaction to abort when a conflict occurs. In general, contention managers are not capable of avoiding conflicts, as they can only select which transaction to abort and the moment it should restart. Since contention managers act only after a conflict is detected, it becomes harder to effectively increase transaction throughput. More proactive approaches have emerged, aiming at predicting when a transaction is likely to abort, postponing its execution. Nevertheless, most of the proposed proactive techniques are limited, as they do not replace the doomed transaction by another or, when they do, they rely on the operating system for that, having little or no control on which transaction to run. This article proposes LUTS, a lightweight user-level transaction scheduler. Unlike other techniques, LUTS provides the means for selecting another transaction to run in parallel, thus improving system throughput. We discuss LUTS design and propose a dynamic conflict-avoidance heuristic built around its scheduling capabilities. Experimental results, conducted with the STAMP and STMBench7 benchmark suites, running on TinySTM and SwissTM, show how our conflict-avoidance heuristic can effectively improve STM performance on high contention applications. © 2012 Springer Science+Business Media, LLC.
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Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)