A phase-shifting control for variable frequency multi-cells interleaved boost pre-regulator based on FPGA device

In this paper were investigated phase-shift control strategies applied to a four cells interleaved high input-power-factor pre-regulator boost rectifier, operating in critical conduction mode, using a non-dissipative commutation cells and frequency modulation. The digital control has been developed using a hardware description language (VHDL) and implemented using the XC2S200E-SpartanII-E/Xilinx FPGA, performing a true critical conduction operation mode for a generic number of interleaved cells. Experimental results are presented, in order to verify the feasibility and performance of the proposed digital control, through the use of a Xilinx FPGA device.

An AC voltage regulator with high-power-factor, and control using a FPGA device

This paper presents the analysis, design, simulation, and experimental results for a high frequency high Power-Factor (PF) AC (Alternate Current) voltage regulator, using a Sepic converter as power stage. The control technique employed to impose a sinusoidal input current waveform, with low Total Harmonic Distortion (THD), is the sinusoidal variable hysteresis control. The control technique was implemented in a FPGA (Field Programmable Gate Array) device, using a Hardware Description Language (VHDL). Through the use of the proposed control technique, the AC voltage regulator performs active power-factor correction, and low THD in the input current, for linear and non-linear loads, satisfying the requirements of the EEC61000-3-2 standards. Experimental results from an example prototype, designed for 300W of nominal output power, 50kHz (switching frequency), and 127Vrms of nominal input and output voltages, are presented in order to validate the proposed AC regulator. © 2005 IEEE.

Algoritmos de detecção de bordas implementados em FPGA

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Aplicando lógica fuzzy no controle de robôs móveis usando dispositivos lógicos programáveis e a linguagem VHDL

Pós-graduação em Engenharia Elétrica - FEIS

Um sistema eletrônico de 2kW para emulação/simulação experimental da característica estática de saída, tensão (versus) corrente, de sistemas de geração com células combustível tipo PEM

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Pré-regulador retificador boost com controle digital por valores médios, para sistema de iluminação fluorescente multi-lâmpadas, utilizando dispositivo FPGA e VHDL

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Implementação em FPGA de um sistema para processamento de imagens digitais para aplicações diversificadas

Pós-graduação em Ciência da Computação - IBILCE

Controle digital através de dispositivo FPGA aplicado a um retificador trifásico híbrido operando com modulação por histerese variável

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

Retificador entrelaçado boost, no modo de condução descontínua, com técnica de correção da corrente de entrada e elevado fator de potência, para aplicação em sistema trólebus

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Pré-regulador retificador entrelaçado (Interleaved) ZCS-FM boost, com controle digital através de dispositivo FPGA e linguagem VHDL

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

Implementação de um nó IEEE 1451, baseado em ferramentas abertas e padronizadas, para aplicações em ambientes de instrumentação distribuída

Pós-graduação em Engenharia Elétrica - FEIS

Modelagem IEEE 1815 DNP3 em VHDL e análise de comunicação SG via IEEE 802.15.4 e IEEE 802.11

Pós-graduação em Engenharia Elétrica - FEIS

Reconhecimento de voz para aplicações em automação implementado em FPGA

In many movies of scientific fiction, machines were capable of speaking with humans. However mankind is still far away of getting those types of machines, like the famous character C3PO of Star Wars. During the last six decades the automatic speech recognition systems have been the target of many studies. Throughout these years many technics were developed to be used in applications of both software and hardware. There are many types of automatic speech recognition system, among which the one used in this work were the isolated word and independent of the speaker system, using Hidden Markov Models as the recognition system. The goals of this work is to project and synthesize the first two steps of the speech recognition system, the steps are: the speech signal acquisition and the pre-processing of the signal. Both steps were developed in a reprogrammable component named FPGA, using the VHDL hardware description language, owing to the high performance of this component and the flexibility of the language. In this work it is presented all the theory of digital signal processing, as Fast Fourier Transforms and digital filters and also all the theory of speech recognition using Hidden Markov Models and LPC processor. It is also presented all the results obtained for each one of the blocks synthesized e verified in hardware