2 resultados para Nmr Phased-array

em Universidade Federal do Rio Grande do Norte(UFRN)


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This work has as main objective the study of arrays of microstrip antennas with superconductor rectangular patch. The phases and the radiation patterns are analyzed. A study of the main theories is presented that explain the microscopic and macroscopic phenomena of superconductivity. The BCS, London equations and the Two Fluid Model, are theories used in the applications of superconductors, at the microstrip antennas and antennas arrays. Phase Arrangements will be analyzed in linear and planar configurations. The arrangement factors of these configurations are obtained, and the phase criteria and the spacing between the elements, are examined in order to minimize losses in the superconductor, compared with normal conductors. The new rectangular patch antenna, consist of a superconducting material, with the critical temperature of 233 K, whose formula is Tl5Ba4Ca2Cu9Oy, is analyzed by the method of the Transverse nTransmission Line (TTL), developed by H. C. C. Fernandes, applied in the Fourier Transform Domain (FTD). The TTL is a full-wave method, which has committed to obtaining the electromagnetic fields in terms of the transverse components of the structure. The inclusion of superconducting patch is made using the complex resistive boundary condition, using the impedance of the superconductor in the Dyadic Green function, in the structure. Results are obtained from the resonance frequency depending on the parameters of the antenna using superconducting material, radiation patterns in E-Plane and H -Plane, the phased antennas array in linear and planar configurations, for different values of phase angles and different spacing between the elements

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This study shows the implementation and the embedding of an Artificial Neural Network (ANN) in hardware, or in a programmable device, as a field programmable gate array (FPGA). This work allowed the exploration of different implementations, described in VHDL, of multilayer perceptrons ANN. Due to the parallelism inherent to ANNs, there are disadvantages in software implementations due to the sequential nature of the Von Neumann architectures. As an alternative to this problem, there is a hardware implementation that allows to exploit all the parallelism implicit in this model. Currently, there is an increase in use of FPGAs as a platform to implement neural networks in hardware, exploiting the high processing power, low cost, ease of programming and ability to reconfigure the circuit, allowing the network to adapt to different applications. Given this context, the aim is to develop arrays of neural networks in hardware, a flexible architecture, in which it is possible to add or remove neurons, and mainly, modify the network topology, in order to enable a modular network of fixed-point arithmetic in a FPGA. Five synthesis of VHDL descriptions were produced: two for the neuron with one or two entrances, and three different architectures of ANN. The descriptions of the used architectures became very modular, easily allowing the increase or decrease of the number of neurons. As a result, some complete neural networks were implemented in FPGA, in fixed-point arithmetic, with a high-capacity parallel processing