4 resultados para Finite state machine

em Universidade Federal do Rio Grande do Norte(UFRN)


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This work aims at modeling power consumption at the nodes of a Wireless Sensor Network (WSN). For doing so, a finite state machine was implemented by means of SystemC-AMS and Stateflow modeling and simulation tools. In order to achieve this goal, communication data in a WSN were collected. Based on the collected data, a simulation environment for power consumption characterization, which aimed at describing the network operation, was developed. Other than performing power consumption simulation, this environment also takes into account a discharging model as to analyze the battery charge level at any given moment. Such analysis result in a graph illustrating the battery voltage variations as well as its state of charge (SOC). Finally, a case study of the WSN power consumption aims to analyze the acquisition mode and network data communication. With this analysis, it is possible make adjustments in node-sensors to reduce the total power consumption of the network.

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In academia, it is common to create didactic processors, facing practical disciplines in the area of Hardware Computer and can be used as subjects in software platforms, operating systems and compilers. Often, these processors are described without ISA standard, which requires the creation of compilers and other basic software to provide the hardware / software interface and hinder their integration with other processors and devices. Using reconfigurable devices described in a HDL language allows the creation or modification of any microarchitecture component, leading to alteration of the functional units of data path processor as well as the state machine that implements the control unit even as new needs arise. In particular, processors RISP enable modification of machine instructions, allowing entering or modifying instructions, and may even adapt to a new architecture. This work, as the object of study addressing educational soft-core processors described in VHDL, from a proposed methodology and its application on two processors with different complexity levels, shows that it s possible to tailor processors for a standard ISA without causing an increase in the level hardware complexity, ie without significant increase in chip area, while its level of performance in the application execution remains unchanged or is enhanced. The implementations also allow us to say that besides being possible to replace the architecture of a processor without changing its organization, RISP processor can switch between different instruction sets, which can be expanded to toggle between different ISAs, allowing a single processor become adaptive hybrid architecture, which can be used in embedded systems and heterogeneous multiprocessor environments

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In this work we study the Hidden Markov Models with finite as well as general state space. In the finite case, the forward and backward algorithms are considered and the probability of a given observed sequence is computed. Next, we use the EM algorithm to estimate the model parameters. In the general case, the kernel estimators are used and to built a sequence of estimators that converge in L1-norm to the density function of the observable process

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The central objective of a study Non-Homogeneous Markov Chains is the concept of weak and strong ergodicity. A chain is weak ergodic if the dependence on the initial distribution vanishes with time, and it is strong ergodic if it is weak ergodic and converges in distribution. Most theoretical results on strong ergodicity assume some knowledge of the limit behavior of the stationary distributions. In this work, we collect some general results on weak and strong ergodicity for chains with space enumerable states, and also study the asymptotic behavior of the stationary distributions of a particular type of Markov Chains with finite state space, called Markov Chains with Rare Transitions