Increased hippocampal excitability and impaired spatial memory function in mice lacking VGLUT2 selectively in neurons defined by tyrosine hydroxylase promoter activity

Three populations of neurons expressing the vesicular glutamate transporter 2 (Vglut2) were recently described in the A10 area of the mouse midbrain, of which two populations were shown to express the gene encoding, the rate-limiting enzyme for catecholamine synthesis, tyrosine hydroxylase (TH).One of these populations (‘‘TH– Vglut2 Class1’’) also expressed the dopamine transporter (DAT) gene while one did not ("TH–Vglut2 Class2"), and the remaining population did not express TH at all ("TH-Vglut2-only"). TH is known to be expressed by a promoter which shows two phases of activation, a transient one early during embryonal development, and a later one which gives rise to stable endogenous expression of the TH gene. The transient phase is, however, not specific to catecholaminergic neurons, a feature taken to advantage here as it enabled Vglut2 gene targeting within all three A10 populations expressing this gene, thus creating a new conditional knockout. These knockout mice showed impairment in spatial memory function. Electrophysiological analyses revealed a profound alteration of oscillatory activity in the CA3 region of the hippocampus. In addition to identifying a novel role for Vglut2 in hippocampus function, this study points to the need for improved genetic tools for targeting of the diversity of subpopulations of the A10 area

Síntese de pigmentos cerâmicos inorgânicos nanométricos e encapsulados com estrutura core-shell pela rota dos precursores poliméricos

The present work has as objective the development of ceramic pigments based in iron oxides and cobalt through the polymeric precursor method, as well as study their characteristics and properties using methods of physical, chemical, morphological and optical characterizations.In this work was used iron nitrate, and cobalt citrate as precursor and nanometer silica as a matrix. The synthesis was based on dissolving the citric acid as complexing agent, addition of metal oxides, such as chromophores ions and polymerization with ethylene glycol. The powder obtained has undergone pre-ignition, breakdown and thermal treatments at different calcination temperatures (700 °C, 800 °C, 900 °C, 1000 °C and 1100 °C). Thermogravimetric analyzes were performed (BT) and Differential Thermal Analysis (DTA), in order to evaluate the term decomposition of samples, beyond characterization by techniques such as BET, which classified as microporous materials samples calcined at 700 ° C, 800 º C and 900 º C and non-porous when annealed at 1000 ° C and 1100 º C, X-ray diffraction (XRD), which identified the formation of two crystalline phases, the Cobalt Ferrite (CoFe2O4) and Cristobalite (SiO2), Scanning Electron Microscopy (SEM) revealed the formation of agglomerates of particles slightly rounded;and Analysis of Colorimetry, temperature of 700 °C, 800 °C and 900 °C showed a brown color and 1000 °C and 1100 °C violet

Metodologia para adaptação de microarquiteturas microprogramadas soft-core à uma ISA padrão: estudo do impacto sobre a complexidade de hardware para o padrão MIPS

In academia, it is common to create didactic processors, facing practical disciplines in the area of Hardware Computer and can be used as subjects in software platforms, operating systems and compilers. Often, these processors are described without ISA standard, which requires the creation of compilers and other basic software to provide the hardware / software interface and hinder their integration with other processors and devices. Using reconfigurable devices described in a HDL language allows the creation or modification of any microarchitecture component, leading to alteration of the functional units of data path processor as well as the state machine that implements the control unit even as new needs arise. In particular, processors RISP enable modification of machine instructions, allowing entering or modifying instructions, and may even adapt to a new architecture. This work, as the object of study addressing educational soft-core processors described in VHDL, from a proposed methodology and its application on two processors with different complexity levels, shows that it s possible to tailor processors for a standard ISA without causing an increase in the level hardware complexity, ie without significant increase in chip area, while its level of performance in the application execution remains unchanged or is enhanced. The implementations also allow us to say that besides being possible to replace the architecture of a processor without changing its organization, RISP processor can switch between different instruction sets, which can be expanded to toggle between different ISAs, allowing a single processor become adaptive hybrid architecture, which can be used in embedded systems and heterogeneous multiprocessor environments