Aplicação de superfícies seletivas em frequência para melhoria de resposta de arranjos de antenas planares

This work aims to show how the application of frequency selective surfaces (FSS) in planar antenna arrays become an alternative to obtain desired radiation characteristics from changes in radiation parameters of the arrays, such as bandwidth, gain and directivity. In addition to analyzing these parameters is also made a study of the mutual coupling between the elements of the array. To accomplish this study, were designed a microstrip antenna array with two patch elements, fed by a network feed. Another change made in the array was the use of the truncated ground plane, with the objective of increasing the bandwidth and miniaturize the elements of the array. In order to study the behavior of frequency selective surfaces applied in antenna arrays, three different layouts were proposed. The first layout uses the FSS as a superstrate (above the array). The second layout uses the FSS as reflector element (below the array). The third layout is placed between two FSS. Numerical and experimental results for each of the proposed configurations are presented in order to validate the research

Contribuição para o estudo do embarque de uma rede neural artificial em field programmable gate array (FPGA)

This study shows the implementation and the embedding of an Artificial Neural Network (ANN) in hardware, or in a programmable device, as a field programmable gate array (FPGA). This work allowed the exploration of different implementations, described in VHDL, of multilayer perceptrons ANN. Due to the parallelism inherent to ANNs, there are disadvantages in software implementations due to the sequential nature of the Von Neumann architectures. As an alternative to this problem, there is a hardware implementation that allows to exploit all the parallelism implicit in this model. Currently, there is an increase in use of FPGAs as a platform to implement neural networks in hardware, exploiting the high processing power, low cost, ease of programming and ability to reconfigure the circuit, allowing the network to adapt to different applications. Given this context, the aim is to develop arrays of neural networks in hardware, a flexible architecture, in which it is possible to add or remove neurons, and mainly, modify the network topology, in order to enable a modular network of fixed-point arithmetic in a FPGA. Five synthesis of VHDL descriptions were produced: two for the neuron with one or two entrances, and three different architectures of ANN. The descriptions of the used architectures became very modular, easily allowing the increase or decrease of the number of neurons. As a result, some complete neural networks were implemented in FPGA, in fixed-point arithmetic, with a high-capacity parallel processing