A situation awareness interface for a bi-wheeled industrial hovercraft: design, development and evaluation

The intention of this thesis is to develop a prototype interface that enables an operator to control a bi-wheeled industrial hovercraft that will work within a fusion power plant if the automation system fails. This fusion power plant is part of the ITER project a conjoint effort of various industrialized countries to develop cleaner sources of energy. The development of the interface prototype will be based on situation awareness concepts, which provide a means to understand how human operators perceive the world around, then process that information and make decisions based on the knowledge that they already have and the projected knowledge of the reactions that will occur in the world in response to the actions the operator makes. Two major situation awareness methods will be used, GDTA as a means to discover the requirements the interface needs to solve, and SAGAT to conduct the evaluation on the three interfaces. This technique can isolate the differences an operator has in situation awareness when presented with relevant information given by each of the three interfaces that were built for this thesis. Where the first interface presents the information within the operator’s focal point of view in a pictorial style, the second interface shows the same information within the same point of view has the first interface but only shows it in a textual manner. While the third interface shows the relevant information in the operator’s peripheral field of view. Also SAGAT can provide insight on the question to know if providing the operator with feed-forward information about the stoppage distances of the bi-wheeled industrial hovercraft has any effect on the operator’s decision making.

Design of boundary-scan testing in CMOS image sensors for industrial applications: internship repor

Tests on printed circuit boards and integrated circuits are widely used in industry,resulting in reduced design time and cost of a project. The functional and connectivity tests in this type of circuits soon began to be a concern for the manufacturers, leading to research for solutions that would allow a reliable, quick, cheap and universal solution. Initially, using test schemes were based on a set of needles that was connected to inputs and outputs of the integrated circuit board (bed-of-nails), to which signals were applied, in order to verify whether the circuit was according to the specifications and could be assembled in the production line. With the development of projects, circuit miniaturization, improvement of the production processes, improvement of the materials used, as well as the increase in the number of circuits, it was necessary to search for another solution. Thus Boundary-Scan Testing was developed which operates on the border of integrated circuits and allows testing the connectivity of the input and the output ports of a circuit. The Boundary-Scan Testing method was converted into a standard, in 1990, by the IEEE organization, being known as the IEEE 1149.1 Standard. Since then a large number of manufacturers have adopted this standard in their products. This master thesis has, as main objective: the design of Boundary-Scan Testing in an image sensor in CMOS technology, analyzing the standard requirements, the process used in the prototype production, developing the design and layout of Boundary-Scan and analyzing obtained results after production. Chapter 1 presents briefly the evolution of testing procedures used in industry, developments and applications of image sensors and the motivation for the use of architecture Boundary-Scan Testing. Chapter 2 explores the fundamentals of Boundary-Scan Testing and image sensors, starting with the Boundary-Scan architecture defined in the Standard, where functional blocks are analyzed. This understanding is necessary to implement the design on an image sensor. It also explains the architecture of image sensors currently used, focusing on sensors with a large number of inputs and outputs.Chapter 3 describes the design of the Boundary-Scan implemented and starts to analyse the design and functions of the prototype, the used software, the designs and simulations of the functional blocks of the Boundary-Scan implemented. Chapter 4 presents the layout process used based on the design developed on chapter 3, describing the software used for this purpose, the planning of the layout location (floorplan) and its dimensions, the layout of individual blocks, checks in terms of layout rules, the comparison with the final design and finally the simulation. Chapter 5 describes how the functional tests were performed to verify the design compliancy with the specifications of Standard IEEE 1149.1. These tests were focused on the application of signals to input and output ports of the produced prototype. Chapter 6 presents the conclusions that were taken throughout the execution of the work.