Automatic layout generation of static CMOS circuits targeting delay and power

The evolution of integrated circuits technologies demands the development of new CAD tools. The traditional development of digital circuits at physical level is based in library of cells. These libraries of cells offer certain predictability of the electrical behavior of the design due to the previous characterization of the cells. Besides, different versions of each cell are required in such a way that delay and power consumption characteristics are taken into account, increasing the number of cells in a library. The automatic full custom layout generation is an alternative each time more important to cell based generation approaches. This strategy implements transistors and connections according patterns defined by algorithms. So, it is possible to implement any logic function avoiding the limitations of the library of cells. Tools of analysis and estimate must offer the predictability in automatic full custom layouts. These tools must be able to work with layout estimates and to generate information related to delay, power consumption and area occupation. This work includes the research of new methods of physical synthesis and the implementation of an automatic layout generation in which the cells are generated at the moment of the layout synthesis. The research investigates different strategies of elements disposition (transistors, contacts and connections) in a layout and their effects in the area occupation and circuit delay. The presented layout strategy applies delay optimization by the integration with a gate sizing technique. This is performed in such a way the folding method allows individual discrete sizing to transistors. The main characteristics of the proposed strategy are: power supply lines between rows, over the layout routing (channel routing is not used), circuit routing performed before layout generation and layout generation targeting delay reduction by the application of the sizing technique. The possibility to implement any logic function, without restrictions imposed by a library of cells, allows the circuit synthesis with optimization in the number of the transistors. This reduction in the number of transistors decreases the delay and power consumption, mainly the static power consumption in submicrometer circuits. Comparisons between the proposed strategy and other well-known methods are presented in such a way the proposed method is validated.

Caracterização e gênese de solos construídos após mineração de carvão na mina Boa Vista, município de Minas do Leão, RS

A mineração de carvão em lavra a céu aberto provoca a mistura dos materiais sobrejacentes ao carvão e que são, posteriormente, utilizados no preenchimento das cavas mineradas. O processo de construção dos solos e a mistura podem ocasionar problemas ambientais pelas alterações quimicas e fisicas provocadas nos solos construidos. A fimde comparar solos construidos de diferentes idades, caracterizou-se a coluna geológica. o ~Io natural originale solos construidos de 2 anos e de 24 anos da mina de carvão Boa Vista, no Municípiode Minas do Leão, RS. A descrição morfológicado perfil do solo e as análises quimicas e fisicas demonstram que os solos construidos apresentam sérias limitações físicas, impedindo o desenvolvimento normal da vegetação. Ademais. diferenças quimicas entre os perfis de diferentes idades originam-se principalmente da utilização de materiais geológicos e processos de construção distintos, do que pelos processos pedogenéticos. Quanto à evolução temporal dos solos construidos, observou-se que está fortemente caracterizada pela intemperização acido-sulfatada, intensificando-se na sub-área mais antiga. O potencial de acidificação e o potencial de neutralização determínados na coluna geológica indicam a existência de camadas com alto potencial gerador de Drenagem Ácida de Minas, recomendando-se o cuidado na deposição final destas camadas. Os resultados deste estudo indicam que as propriedades químicas e fisicas determinadas nos solos construidos servem como indicadores para o monitoramentode áreas construídas,visando a prevenção de danos ambientais.