Efeito da vitamina K da dieta na anticoagulação oral crônica : evidências prospectivas observacionais e randomizadas

Base Teórica. Embora vários relatos de casos tenham sugerido uma associação entre a ingesta de vitamina K e a instabilidade da anticoagulação oral, o impacto clínico de diferentes quantidades de vitamina K dietética na anticoagulação oral crônica nunca foi prospectivamente estabelecido. Métodos. Características clínicas e estimativas semi-quantitativas sobre a ingesta de vitamina K foram avaliadas, prospectivamente, em 230 visitas ambulatoriais de pacientes anticoagulados em um hospital público universitário (protocolo observacional). Treze pacientes ambulatoriais anticoagulados cronicamente e estáveis foram arrolados em um ensaio clínico randomizado cruzado de intervenção dietética de 4 dias com aumento e diminuição de 5 vezes da sua ingesta habitual de vitamina K (protocolo experimental randomizado). Resultados. Protocolo observacional: Na análise univariada, identificamos uma associação estatisticamente significativa, progressiva e inversa entre um escore global de ingesta de vitamina K e diferentes níveis de anticoagulação. Na análise multivariada, a ingesta de vitamina K dietética foi independentemente associada com níveis subterapêuticos e anticoagulação excessiva (ambos valores de p =0,04), após ajuste para escolaridade, renda, uso de novos fármacos, aderência à anticoagulação oral e intercorrências clínicas. Protocolo randomizado: Após a dieta restrita em vitamina K, observamos um aumento significativo nos valores do INR (de 2,6 ± 0,5 para 3,3 ± 1,0, p=0,03; do início para o dia 7) enquanto, após a dieta enriquecida, identificamos uma diminuição significativa e mais precoce no INR (de 3,2 ± 0,9 para 2,8 ± 0,7, p=0,005; do início para o dia 4). O efeito da ingesta de vitamina K sobre a variação do INR foi particularmente influenciada pela ingesta média habitual da vitamina. Conclusões. Nossos dados prospectivos reforçam o conceito de que a interação vitamina K e fármacos cumarínicos é de fato real e clinicamente relevante, devendo ser reconhecida como um fator importante e independente que interfere com a estabilidade da anticoagulação oral crônica.

From XML to relational view updates: applying old solutions to solve a new problem

XML has become an important medium for data exchange, and is frequently used as an interface to - i.e. a view of - a relational database. Although lots of work have been done on querying relational databases through XML views, the problem of updating relational databases through XML views has not received much attention. In this work, we give the rst steps towards solving this problem. Using query trees to capture the notions of selection, projection, nesting, grouping, and heterogeneous sets found throughout most XML query languages, we show how XML views expressed using query trees can be mapped to a set of corresponding relational views. Thus, we transform the problem of updating relational databases through XML views into a classical problem of updating relational databases through relational views. We then show how updates on the XML view are mapped to updates on the corresponding relational views. Existing work on updating relational views can then be leveraged to determine whether or not the relational views are updatable with respect to the relational updates, and if so, to translate the updates to the underlying relational database. Since query trees are a formal characterization of view de nition queries, they are not well suited for end-users. We then investigate how a subset of XQuery can be used as a top level language, and show how query trees can be used as an intermediate representation of view de nitions expressed in this subset.

Automatic layout generation of static CMOS circuits targeting delay and power

The evolution of integrated circuits technologies demands the development of new CAD tools. The traditional development of digital circuits at physical level is based in library of cells. These libraries of cells offer certain predictability of the electrical behavior of the design due to the previous characterization of the cells. Besides, different versions of each cell are required in such a way that delay and power consumption characteristics are taken into account, increasing the number of cells in a library. The automatic full custom layout generation is an alternative each time more important to cell based generation approaches. This strategy implements transistors and connections according patterns defined by algorithms. So, it is possible to implement any logic function avoiding the limitations of the library of cells. Tools of analysis and estimate must offer the predictability in automatic full custom layouts. These tools must be able to work with layout estimates and to generate information related to delay, power consumption and area occupation. This work includes the research of new methods of physical synthesis and the implementation of an automatic layout generation in which the cells are generated at the moment of the layout synthesis. The research investigates different strategies of elements disposition (transistors, contacts and connections) in a layout and their effects in the area occupation and circuit delay. The presented layout strategy applies delay optimization by the integration with a gate sizing technique. This is performed in such a way the folding method allows individual discrete sizing to transistors. The main characteristics of the proposed strategy are: power supply lines between rows, over the layout routing (channel routing is not used), circuit routing performed before layout generation and layout generation targeting delay reduction by the application of the sizing technique. The possibility to implement any logic function, without restrictions imposed by a library of cells, allows the circuit synthesis with optimization in the number of the transistors. This reduction in the number of transistors decreases the delay and power consumption, mainly the static power consumption in submicrometer circuits. Comparisons between the proposed strategy and other well-known methods are presented in such a way the proposed method is validated.

Low cost BIST techniques for linear and non-linear analog circuits

With the ever increasing demands for high complexity consumer electronic products, market pressures demand faster product development and lower cost. SoCbased design can provide the required design flexibility and speed by allowing the use of IP cores. However, testing costs in the SoC environment can reach a substantial percent of the total production cost. Analog testing costs may dominate the total test cost, as testing of analog circuits usually require functional verification of the circuit and special testing procedures. For RF analog circuits commonly used in wireless applications, testing is further complicated because of the high frequencies involved. In summary, reducing analog test cost is of major importance in the electronic industry today. BIST techniques for analog circuits, though potentially able to solve the analog test cost problem, have some limitations. Some techniques are circuit dependent, requiring reconfiguration of the circuit being tested, and are generally not usable in RF circuits. In the SoC environment, as processing and memory resources are available, they could be used in the test. However, the overhead for adding additional AD and DA converters may be too costly for most systems, and analog routing of signals may not be feasible and may introduce signal distortion. In this work a simple and low cost digitizer is used instead of an ADC in order to enable analog testing strategies to be implemented in a SoC environment. Thanks to the low analog area overhead of the converter, multiple analog test points can be observed and specific analog test strategies can be enabled. As the digitizer is always connected to the analog test point, it is not necessary to include muxes and switches that would degrade the signal path. For RF analog circuits, this is specially useful, as the circuit impedance is fixed and the influence of the digitizer can be accounted for in the design phase. Thanks to the simplicity of the converter, it is able to reach higher frequencies, and enables the implementation of low cost RF test strategies. The digitizer has been applied successfully in the testing of both low frequency and RF analog circuits. Also, as testing is based on frequency-domain characteristics, nonlinear characteristics like intermodulation products can also be evaluated. Specifically, practical results were obtained for prototyped base band filters and a 100MHz mixer. The application of the converter for noise figure evaluation was also addressed, and experimental results for low frequency amplifiers using conventional opamps were obtained. The proposed method is able to enhance the testability of current mixed-signal designs, being suitable for the SoC environment used in many industrial products nowadays.