Implementation of soft processor based SOC for JPEG compression on FPGA

With the advent of semiconductor process and EDA tools technology, IC designers can integrate more functions. However, to reduce the demand of time-to-market and tackle the increasing complexity of SoC, the need of fast prototyping and testing is growing. Taking advantage of deep submicron technology, modern FPGAs provide a fast and low-cost prototyping with large logic resources and high performance. So the hardware is mapped onto an emulation platform based on FPGA that mimics the behaviour of SOC. In this paper we use FPGA as a system on chip which is then used for image compression by 2-D DCT respectively and proposed SoC for image compression using soft core Microblaze. The JPEG standard defines compression techniques for image data. As a consequence, it allows to store and transfer image data with considerably reduced demand for storage space and bandwidth. From the four processes provided in the JPEG standard, only one, the baseline process is widely used. Proposed SoC for JPEG compression has been implemented on FPGA Spartan-6 SP605 evaluation board using Xilinx platform studio, because field programmable gate array have reconfigurable hardware architecture. Hence the JPEG image with high speed and reduced size can be obtained at low risk and low power consumption of about 0.699W. The proposed SoC for image compression is evaluated at 83.33MHz on Xilinx Spartan-6 FPGA.

Neural net device for IED gas identification

Most of the embedded systems that detect gases today are for specific types and indicate the levels of the gas present with their standard sensors. We introduce here an adaptable system that can detect and distinguish the type of gas in a volatile environment such as searching for Improvised Explosive Devices (IEDs). This is achieved with a small device mounted on a mobile robot through the use of an algorithm that is an Artificial Neural Network (ANN). The input layer to the ANN is an array of environmental and gas sensors. The small device, comprising of a multilayer circuit board with sensors in a rugged lightweight case, mounts on the mobile robot and communicates the gaseous data to the robot.

The ANN is implemented in the hardware of a FPGA with the control of the ANN being achieved through the configurable processor and memory. Calibration and testing of the device involves the training of device and the ANN with specific target gases. The Accuracy of the device is validated through lab testing against high-end gas test instruments with known concentrations of gases.

Effects of type reduction algorithms on forecasting accuracy of IT2FLS models

Type reduction (TR) is one of the key components of interval type-2 fuzzy logic systems (IT2FLSs). Minimizing the computational requirements has been one of the key design criteria for developing TR algorithms. Often researchers give more rewards to computationally less expensive TR algorithms. This paper evaluates and compares five frequently used TR algorithms based on their contribution to the forecasting performance of IT2FLS models. Algorithms are judged based on the generalization power of IT2FLS models developed using them. Synthetic and real world case studies with different levels of uncertainty are considered to examine effects of TR algorithms on forecasts' accuracies. As per obtained results, Coupland-Jonh TR algorithm leads to models with a higher and more stable forecasting performance. However, there is no obvious and consistent relationship between the widths of the type reduced set and the TR algorithm. © 2013 Elsevier B.V.