Optimization of electroless copper plating on polyethylene films modified by surface grafting of vinyl ether of monoethanolamine

Metallized plastics have recently received significant interest for their useful applications in electronic devices such as for integrated circuits, packaging, printed circuits and sensor applications. In this work the metallized films were developed by electroless copper plating of polyethylene films grafted with vinyl ether of monoethanoleamine. There are several techniques for metal deposition on surface of polymers such as evaporation, sputtering, electroless plating and electrolysis. In this work the metallized films were developed by electroless copper plating of polyethylene films grafted with vinyl ether of monoethanoleamine. Polyethylene films were subjected to gamma-radiation induced surface graft copolymerization with vinyl ether of monoethanolamine. Electroless copper plating was carried out effectively on the modified films. The catalytic processes for the electroless copper plating in the presence and the absence of SnCl2 sensitization were studied and the optimum activation conditions that give the highest plating rate were determined. The effect of grafting degree on the plating rate is studied. Electroless plating conditions (bath additives, pH and temperature) were optimized. Plating rate was determined gravimetrically and spectrophotometrically at different grafting degrees. The results reveal that plating rate is a function of degree of grafting and increases with increasing grafted vinyl ether of monoethanolamine onto polyethylene. It was found that pH 13 of electroless bath and plating temperature 40°C are the optimal conditions for the plating process. The increasing of grafting degree results in faster plating rate at the same pH and temperature. The surface morphology of the metallized films was investigated using scanning electron microscopy (SEM). The adhesion strength between the metallized layer and grafted polymer was studied using tensile machine. SEM photos and adhesion measurements clarified that uniform and adhered deposits were obtained under optimum conditions.

Shared neural circuits for mentalizing about the self and others

Although many examples exist for shared neural representations of self and other, it is unknown how such shared representations interact with the rest of the brain. Furthermore, do high-level inference-based shared mentalizing representations interact with lower level embodied/simulation-based shared representations? We used functional neuroimaging (fMRI) and a functional connectivity approach to assess these questions during high-level inference-based mentalizing. Shared mentalizing representations in ventromedial prefrontal cortex, posterior cingulate/precuneus, and temporo-parietal junction (TPJ) all exhibited identical functional connectivity patterns during mentalizing of both self and other. Connectivity patterns were distributed across low-level embodied neural systems such as the frontal operculum/ventral premotor cortex, the anterior insula, the primary sensorimotor cortex, and the presupplementary motor area. These results demonstrate that identical neural circuits are implementing processes involved in mentalizing of both self and other and that the nature of such processes may be the integration of low-level embodied processes within higher level inference-based mentalizing.

Pullpipelining: A technique for systolic pipelined circuits

Pullpipelining, a pipeline technique where data is pulled from successor stages from predecessor stages is proposed Control circuits using a synchronous, a semi-synchronous and an asynchronous approach are given. Simulation examples for a DLX generic RISC datapath show that common control pipeline circuit overhead is avoided using the proposal. Applications to linear systolic arrays in cases when computation is finished at early stages in the array are foreseen. This would allow run-time data-driven digital frequency modulation of synchronous pipelined designs. This has applications to implement algorithms exhibiting average-case processing time using a synchronous approach.

Verification and FPGA circuits of a block-2 fast path-based predictor

This paper formally derives a new path-based neural branch prediction algorithm (FPP) into blocks of size two for a lower hardware solution while maintaining similar input-output characteristic to the algorithm. The blocked solution, here referred to as B2P algorithm, is obtained using graph theory and retiming methods. Verification approaches were exercised to show that prediction performances obtained from the FPP and B2P algorithms differ within one mis-prediction per thousand instructions using a known framework for branch prediction evaluation. For a chosen FPGA device, circuits generated from the B2P algorithm showed average area savings of over 25% against circuits for the FPP algorithm with similar time performances thus making the proposed blocked predictor superior from a practical viewpoint.

Active micromachined integrated terahertz circuits

Schottky barrier diodes have been integrated into on-chip rectangular waveguides. Two novel techniques have been developed to fabricate diodes with posts suitable for integration into waveguides. One technique produces diodes with anode diameters of the order of microns with post heights from 90 to 125 microns and the second technique produces sub-micron anodes with post heights around 20 microns. A method has been developed to incorporate these structures into a rectangular waveguide and provide a top contact onto the anode which could be used as an I.F. output in a mixer circuit. Devices have been fabricated and D.C. characterized.

The printed page

In the year 1702 two books were published, in Oxford and Paris, that can now be seen as defining the presses that produced them. In Paris, the Imprimerie Royale issued the Médailles sur les principaux évènements du règne de Louis le Grand, a large folio of text and plates intended to glorify the regime of Louis XIV. In Oxford, the first, large format volume of Clarendon’s The history of the rebellion appeared; painstakingly edited at Christ Church, it brought prestige and profit to the University. Both were considerable statements of publishing intent in graphic form: both were sumptuous, and both used types and decorations reserved to their respective presses. But the French book points the way to future developments in typography, particularly in the design of type, while the Oxford book is a summation of the past, and its types and page design would be abandoned by the Oxford press in little more than thirty years. Tracing the printed pages of Oxford books from the late sixteenth to the mid-eighteenth century shows changes that parallel wider developments in English and European typography, but from a distinctly Oxford perspective.