A block coprocessor for user data rate improvements to GPRS coding scheme 4

The general packet radio service (GPRS) has been developed to allow packet data to be transported efficiently over an existing circuit-switched radio network, such as GSM. The main application of GPRS are in transporting Internet protocol (IP) datagrams from web servers (for telemetry or for mobile Internet browsers). Four GPRS baseband coding schemes are defined to offer a trade-off in requested data rates versus propagation channel conditions. However, data rates in the order of > 100 kbits/s are only achievable if the simplest coding scheme is used (CS-4) which offers little error detection and correction (EDC) (requiring excellent SNR) and the receiver hardware is capable of full duplex which is not currently available in the consumer market. A simple EDC scheme to improve the GPRS block error rate (BLER) performance is presented, particularly for CS-4, however gains in other coding schemes are seen. For every GPRS radio block that is corrected by the EDC scheme, the block does not need to be retransmitted releasing bandwidth in the channel and improving the user's application data rate. As GPRS requires intensive processing in the baseband, a viable field programmable gate array (FPGA) solution is presented in this paper.

Improving CS-4 user data rate in GPRS enabled devices by using a BLER co-processor

The General Packet Radio Service (GPRS) was developed to allow packet data to be transported efficiently over an existing circuit switched radio network. The main applications for GPRS are in transporting IP datagram’s from the user’s mobile Internet browser to and from the Internet, or in telemetry equipment. A simple Error Detection and Correction (EDC) scheme to improve the GPRS Block Error Rate (BLER) performance is presented, particularly for coding scheme 4 (CS-4), however gains in other coding schemes are seen. For every GPRS radio block that is corrected by the EDC scheme, the block does not need to be retransmitted releasing bandwidth in the channel, improving throughput and the user’s application data rate. As GPRS requires intensive processing in the baseband, a viable hardware solution for a GPRS BLER co-processor is discussed that has been currently implemented in a Field Programmable Gate Array (FPGA) and presented in this paper.

Are local economic development incentives promoting job growth? An empirical case study

At a time when cities are competing with one another to attract or retain jobs within a globalizing economy, city governments are providing an array of financial incentives to stimulate job growth and retain existing jobs, particularly in high cost locations. This paper provides the first systematic and comprehensive analysis of datasets on economic development incentives in New York City over the last fifteen years. The evidence on job retention and creation is mixed. Although many companies do not meet their agreed-upon job targets in absolute terms, the evidence suggests that companies receiving subsidies outperform their respective industries in terms of employment growth, that is, the grow more, or decline less. We emphasize that this finding is difficult to interpret, since firms receiving incentives may not be representative of the industry as a whole. In other words, their above-average performance may simply reflect the fact that the Economic Development Corporation (EDC) selects economically promising companies within manufacturing (or other industries) when granting incentives. At the same time, it is also possible that receiving incentives helps these companies to become stronger.