3 resultados para surface deposition
em Cochin University of Science
Resumo:
The growth of Fe–Ni based amorphous nanocolumns has been studied using atomic force microscopy. The root mean square roughness of the film surface increased with the deposition time but showed a little change at higher deposition time. It was found that the separation between the nanostructures increased sharply during the initial stages of growth and the change was less pronounced at higher deposition time. During the initial stages of the column growth, a roughening process due to self shadowing is dominant and, as the deposition time increases, a smoothening mechanism takes place due to the surface diffusion of adatoms
Resumo:
Laser produced plasma from silver is generated using a Q-switched Nd:YAG laser. Optical emission spectroscopy is used to carry out time of flight (TOF) analysis of atomic particles. An anomalous double peak profile in the TOF distribution is observed at low pressure. A collection of slower species emerge at reduced pressure below 4 X lO-3 mbar and this species has a greater velocity spread. At high pressure the plasma expansion follows the shockwave model with cylindrical symmetry whereas at reduced pressure it shows unsteady adiabatic expansion (UAE). During UAE the species show a parabolic increases in the expansion time with radial distance whereas during shock wave expansion the exponent is less than one. The angular distribution of the ablated species in the plume is obtained from the measurement of optical density of thin films deposited on to glass substrates kept perpendicular to the plume. There is a sharp variation in the film thickness away from the film centre due to asymmetries in the plume.
Resumo:
Present work deals with the Preparation and characterization of high-k aluminum oxide thin films by atomic layer deposition for gate dielectric applications.The ever-increasing demand for functionality and speed for semiconductor applications requires enhanced performance, which is achieved by the continuous miniaturization of CMOS dimensions. Because of this miniaturization, several parameters, such as the dielectric thickness, come within reach of their physical limit. As the required oxide thickness approaches the sub- l nm range, SiO 2 become unsuitable as a gate dielectric because its limited physical thickness results in excessive leakage current through the gate stack, affecting the long-term reliability of the device. This leakage issue is solved in the 45 mn technology node by the integration of high-k based gate dielectrics, as their higher k-value allows a physically thicker layer while targeting the same capacitance and Equivalent Oxide Thickness (EOT). Moreover, Intel announced that Atomic Layer Deposition (ALD) would be applied to grow these materials on the Si substrate. ALD is based on the sequential use of self-limiting surface reactions of a metallic and oxidizing precursor. This self-limiting feature allows control of material growth and properties at the atomic level, which makes ALD well-suited for the deposition of highly uniform and conformal layers in CMOS devices, even if these have challenging 3D topologies with high aspect-ratios. ALD has currently acquired the status of state-of-the-art and most preferred deposition technique, for producing nano layers of various materials of technological importance. This technique can be adapted to different situations where precision in thickness and perfection in structures are required, especially in the microelectronic scenario.