Rubber-Layered Clay Nanocomposites

Department of Polymer Science and Rubber Technology,Cochin University of Science and Technology

Physicochemical and Biochemical Characterization of Enzymes Immobilized on lnorganic Matrices

Biotechnology is currently considered as a useful altemative to conventional process technology in industrial and catalytic fields. The increasing awareness of the need to create green and sustainable production processes in all fields of chemistry has stimulated materials scientists to search for innovative catalysts supports. lmmobilization of enzymes in inorganic matrices is very useful in practical applications due to the preserved stability and catalytic activity of the immobilized enzymes under extreme conditions. Nanostructured inorganic, organic or hybrid organic-inorganic nanocomposites present paramount advantages to facilitate integration and miniaturization of the devices (nanotechnologies), thus affording a direct connection between the inorganic, organic and biological worlds. These properties, combined with good chemical stability, make them competent candidates for designed biocatalysts, protein-separation devices, drug delivery systems, and biosensors Aluininosilicate clays and layered double hydroxides, displaying, respectively, cation and anion exchange properties, were found to be attractive materials for immobilization because of their hydrophilic, swelling and porosity properties, as well as their mechanical and thermal stability.The aim of this study is the replacement of inorganic catalysts by immobilized lipases to obtain purer and healthier products.Mesocellular silica foams were synthesized by oil-in-water microemulsion templating route and were functionalized with silane and glutaraldehyde. " The experimental results from IR spectroscopy and elemental analysis demonstrated the presence of immobilized lipase and also functionalisation with silane and glutaraldehyde on the supports.The present work is a comprehensive study on enzymatic synthesis of butyl isobutyrate through esterification reaction using lipase immobilized onto mesocellular siliceous foams and montmorillonite K-10 via adsorption and covalent binding. Moreover, the irnrnobil-ization does not modify the nature of the kinetic mechanism proposed which is of the Bi-Bi Ping—Pong type with inhibition by n-butanol. The immobilized biocatalyst can be commercially exploited for the synthesis of other short chain flavor esters. Mesocellular silica foams (MCF) were synthesized by microemusion templating method via two different routes (hydrothermal and room temperature). and were functionalized with silane and glutaraldehyde. Candida rugosa lipase was adsorbed onto MCF silica and clay using heptane as the coupling medium for reactions in non-aqueous media. I From XRD results, a slight broadening and lowering of d spacing values after immobilization and modification was observed in the case of MCF 160 and MCF35 but there was no change in the d-spacing in the case of K-10 which showed that the enzymes are adsorbed only on the external surface. This was further confirmed from the nitrogen adsorption measurements

Performance analysis of double digit decimal multiplier on various FPGA logic families

Decimal multiplication is an integral part of financial, commercial, and internet-based computations. This paper presents a novel double digit decimal multiplication (DDDM) technique that performs 2 digit multiplications simultaneously in one clock cycle. This design offers low latency and high throughput. When multiplying two n-digit operands to produce a 2n-digit product, the design has a latency of (n / 2) 1 cycles. The paper presents area and delay comparisons for 7-digit, 16-digit, 34-digit double digit decimal multipliers on different families of Xilinx, Altera, Actel and Quick Logic FPGAs. The multipliers presented can be extended to support decimal floating-point multiplication for IEEE P754 standard

High performance, low latency double digit decimal multiplier on ASIC and FPGA

Decimal multiplication is an integral part of financial, commercial, and internet-based computations. This paper presents a novel double digit decimal multiplication (DDDM) technique that offers low latency and high throughput. This design performs two digit multiplications simultaneously in one clock cycle. Double digit fixed point decimal multipliers for 7digit, 16 digit and 34 digit are simulated using Leonardo Spectrum from Mentor Graphics Corporation using ASIC Library. The paper also presents area and delay comparisons for these fixed point multipliers on Xilinx, Altera, Actel and Quick logic FPGAs. This multiplier design can be extended to support decimal floating point multiplication for IEEE 754- 2008 standard.