Template-Assisted Synthesis and Characterization of Passivated Nickel Nanoparticles

Potential applications of nickel nanoparticles demand the synthesis of self-protected nickel nanoparticles by different synthesis techniques. A novel and simple technique for the synthesis of self-protected nickel nanoparticles is realized by the inter-matrix synthesis of nickel nanoparticles by cation exchange reduction in two types of resins. Two different polymer templates namely strongly acidic cation exchange resins and weakly acidic cation exchange resins provided with cation exchange sites which can anchor metal cations by the ion exchange process are used. The nickel ions which are held at the cation exchange sites by ion fixation can be subsequently reduced to metal nanoparticles by using sodium borohydride as the reducing agent. The composites are cycled repeating the loading reduction cycle involved in the synthesis procedure. X-Ray Diffraction, Scanning Electron Microscopy, Transmission Electron microscopy, Energy Dispersive Spectrum, and Inductively Coupled Plasma Analysis are effectively utilized to investigate the different structural characteristics of the nanocomposites. The hysteresis loop parameters namely saturation magnetization and coercivity are measured using Vibrating Sample Magnetometer. The thermomagnetization study is also conducted to evaluate the Curie temperature values of the composites. The effect of cycling on the structural and magnetic characteristics of the two composites are dealt in detail. A comparison between the different characteristics of the two nanocomposites is also provided

Microwave Plasma Assisted ALD Development for the Deposition of Gate Oxides & ALD of High-k Dielectrics

The semiconductor industry's urge towards faster, smaller and cheaper integrated circuits has lead the industry to smaller node devices. The integrated circuits that are now under volume production belong to 22 nm and 14 nm technology nodes. In 2007 the 45 nm technology came with the revolutionary high- /metal gate structure. 22 nm technology utilizes fully depleted tri-gate transistor structure. The 14 nm technology is a continuation of the 22 nm technology. Intel is using second generation tri-gate technology in 14 nm devices. After 14 nm, the semiconductor industry is expected to continue the scaling with 10 nm devices followed by 7 nm. Recently, IBM has announced successful production of 7 nm node test chips. This is the fashion how nanoelectronics industry is proceeding with its scaling trend. For the present node of technologies selective deposition and selective removal of the materials are required. Atomic layer deposition and the atomic layer etching are the respective techniques used for selective deposition and selective removal. Atomic layer deposition still remains as a futuristic manufacturing approach that deposits materials and lms in exact places. In addition to the nano/microelectronics industry, ALD is also widening its application areas and acceptance. The usage of ALD equipments in industry exhibits a diversi cation trend. With this trend, large area, batch processing, particle ALD and plasma enhanced like ALD equipments are becoming prominent in industrial applications. In this work, the development of an atomic layer deposition tool with microwave plasma capability is described, which is a ordable even for lightly funded research labs.