23 resultados para Reconfigurable architectures

em Cochin University of Science


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The thesis focuses on efficient design methods and reconfiguration architectures suitable for higher performance wireless communication .The work presented in this thesis describes the development of compact,inexpensive and low power communication devices that are robust,testable and capable of handling multiple communication standards.A new multistandard Decimation Filter Design Toolbox is developed in MATLAB GUIDE environment.RNS based dual-mode decimation filters reconfigurable for WCDMA/WiMAX and WCDMA/WLANa standards are designed and implemented.It offers high speed operation with lesser area requirement and lower dynamic power dissipation.A novel sigma-delta based direct analog-to-residue converter that reduces the complexity of RNS conversion circuitry is presented.The performance of an OFDM communication system with a new RRNS-convolutional concatenated coding is analysed and improved BER performance is obtained under different channel conditions. Easily testable MAC units for filters are presented using Reed-Muller logic for realization.

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A new design for a compact electronically reconffgurable singlefeed dual frequency dual-polarized operation of a square-microstrip antenna capable of achieving tunable frequency ratios in the range 1.1 to 1.37 is proposed and experimentally studied. Varactor diodes inlegruted with the arms of the hexagonal slot and embedded in the square patch are used to tune the operating frequencies by applying reverse-bias voltage. The design has the advantage of size reduction up to 73.21% and 49.86% for the two resonant frequencies, respectively, as compared to standard rectangular patches. The antenna offers good bandwidth of 5.74% and 5.36% for the two operating frequencies. A highly simplified tuning circuitry without any transmission lines adds to the compactness of the design

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A novel design of a computer electronically reconfigurable dual frequency dual polarized single feed hexagonal slot loaded microstrip antenna in L-band is introduced in this chapter. pin diodes are used to switch the operating frequencies considerably without much affecting the radiation characteristics and gain. the antenna can work with a frequency ratio varying in the wide range from 1.2 to 1.4. the proposed design has an added advantage of size reduction up to 72.21% and 46.84% for the two resonating frequencies compared to standard rectangular patches. the design also gives considerable bandwidth of up to 2.82% and 2.42 % for the operating frequencies.

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Analog-to digital Converters (ADC) have an important impact on the overall performance of signal processing system. This research is to explore efficient techniques for the design of sigma-delta ADC,specially for multi-standard wireless tranceivers. In particular, the aim is to develop novel models and algorithms to address this problem and to implement software tools which are avle to assist the designer's decisions in the system-level exploration phase. To this end, this thesis presents a framework of techniques to design sigma-delta analog to digital converters.A2-2-2 reconfigurable sigma-delta modulator is proposed which can meet the design specifications of the three wireless communication standards namely GSM,WCDMA and WLAN. A sigma-delta modulator design tool is developed using the Graphical User Interface Development Environment (GUIDE) In MATLAB.Genetic Algorithm(GA) based search method is introduced to find the optimum value of the scaling coefficients and to maximize the dynamic range in a sigma-delta modulator.

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The design of a compact, single feed, dual frequency dual polarized and electronically reconfigurable microstrip antenna is presented in this paper. A square patch loaded with a hexagonal slot having extended slot arms constitutes the fundamental structure of the antenna. The tuning of the two resonant frequencies is realized by varying the effective electrical length of the slot arms by embedding varactor diodes across the slots. A high tuning range of 34.43% (1.037–1.394 GHz) and 9.27% (1.359–1.485 GHz) is achieved for the two operating frequencies respectively, when the bias voltage is varied from 0 to −30 V. The salient feature of this design is that it uses no matching networks even though the resonant frequencies are tuned in a wide range with good matching below −10 dB. The antenna has an added advantage of size reduction up to 80.11% and 65.69% for the two operating frequencies compared to conventional rectangular patches.

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A new electronically reconfigurable dual frequency microstrip patch antenna with highly simplified varactor tuning circuitry is presented. The proposed design allows relatively independent selection of the two operating frequencies. Tuning ranges of 7.1 and 4.1% are realised for the two resonant frequencies without the use of any matching circuits.

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In this work,we investigate novel designs of compact electronically reconfigurable dual frequency microstrip antennas with a single feed,operating mainly in L-band,without using any matching networks and complicated biasing circuitry.These antennas have been designed to operate in very popular frequency range where a great number of wireless communication applications exist.Efforts were carried out to introduce a successful,low cost reconfigurable dual-frequency microstrip antenna design to the wireless and radio frequency design community.

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Most of the commercial and financial data are stored in decimal fonn. Recently, support for decimal arithmetic has received increased attention due to the growing importance in financial analysis, banking, tax calculation, currency conversion, insurance, telephone billing and accounting. Performing decimal arithmetic with systems that do not support decimal computations may give a result with representation error, conversion error, and/or rounding error. In this world of precision, such errors are no more tolerable. The errors can be eliminated and better accuracy can be achieved if decimal computations are done using Decimal Floating Point (DFP) units. But the floating-point arithmetic units in today's general-purpose microprocessors are based on the binary number system, and the decimal computations are done using binary arithmetic. Only few common decimal numbers can be exactly represented in Binary Floating Point (BF P). ln many; cases, the law requires that results generated from financial calculations performed on a computer should exactly match with manual calculations. Currently many applications involving fractional decimal data perform decimal computations either in software or with a combination of software and hardware. The performance can be dramatically improved by complete hardware DFP units and this leads to the design of processors that include DF P hardware.VLSI implementations using same modular building blocks can decrease system design and manufacturing cost. A multiplexer realization is a natural choice from the viewpoint of cost and speed.This thesis focuses on the design and synthesis of efficient decimal MAC (Multiply ACeumulate) architecture for high speed decimal processors based on IEEE Standard for Floating-point Arithmetic (IEEE 754-2008). The research goal is to design and synthesize deeimal'MAC architectures to achieve higher performance.Efficient design methods and architectures are developed for a high performance DFP MAC unit as part of this research.

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Design and study of molecular receptors capable of mimicking natural processes has found applications in basic research as well as in the development of potentially useful technologies. Of the various receptors reported, the cyclophanes are known to encapsulate guest molecules in their cavity utilizing various non–covalent interactions resulting in significant changes in their optical properties. This unique property of the cyclophanes has been widely exploited for the development of selective and sensitive probes for a variety of guest molecules including complex biomolecules. Further, the incorporation of metal centres into these systems added new possibilities for designing receptors such as the metallocyclophanes and transition metal complexes, which can target a large variety of Lewis basic functional groups that act as selective synthetic receptors. The ligands that form complexes with the metal ions, and are capable of further binding to Lewis-basic substrates through open coordination sites present in various biomolecules are particularly important as biomolecular receptors. In this context, we synthesized a few anthracene and acridine based metal complexes and novel metallocyclophanes and have investigated their photophysical and biomolecular recognition properties.

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The recent trends envisage multi-standard architectures as a promising solution for the future wireless transceivers to attain higher system capacities and data rates. The computationally intensive decimation filter plays an important role in channel selection for multi-mode systems. An efficient reconfigurable implementation is a key to achieve low power consumption. To this end, this paper presents a dual-mode Residue Number System (RNS) based decimation filter which can be programmed for WCDMA and 802.16e standards. Decimation is done using multistage, multirate finite impulse response (FIR) filters. These FIR filters implemented in RNS domain offers high speed because of its carry free operation on smaller residues in parallel channels. Also, the FIR filters exhibit programmability to a selected standard by reconfiguring the hardware architecture. The total area is increased only by 24% to include WiMAX compared to a single mode WCDMA transceiver. In each mode, the unused parts of the overall architecture is powered down and bypassed to attain power saving. The performance of the proposed decimation filter in terms of critical path delay and area are tabulated.

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The recent trends envisage multi-standard architectures as a promising solution for the future wireless transceivers. The computationally intensive decimation filter plays an important role in channel selection for multi-mode systems. An efficient reconfigurable implementation is a key to achieve low power consumption. To this end, this paper presents a dual-mode Residue Number System (RNS) based decimation filter which can be programmed for WCDMA and 802.11a standards. Decimation is done using multistage, multirate finite impulse response (FIR) filters. These FIR filters implemented in RNS domain offers high speed because of its carry free operation on smaller residues in parallel channels. Also, the FIR filters exhibit programmability to a selected standard by reconfiguring the hardware architecture. The total area is increased only by 33% to include WLANa compared to a single mode WCDMA transceiver. In each mode, the unused parts of the overall architecture is powered down and bypassed to attain power saving. The performance of the proposed decimation filter in terms of critical path delay and area are tabulated

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A systematic investigation of the reactivity and functionalization of two heterocyclic analogs of triphenylmethane , namely tris(2-thienyl)methane and tris(2-furyl)methane have been carried out and the results are presented in this thesis entitled "NOVEL REACTIONS OF TRIS(2-THIENYL)METHANE AND TRIS(2-FURYL)METHANE.". The history of organic free radicals dates back to Gomberg's monumental discovery of the triphenylmethyl radical in 1900. The heterocyclic analogs of triarylmethane are also interesting from the vantage point of their transformation to the corresponding radicals akin to Gomberg ' s triphenylmethyl radical and also they are prone to further transformation leading to three dimensionally elongated molecules such as dendrimers. Dendritic architectures are one of the most pervasive topologies observed in nature at the macro- and microdimensional length devices. Because of their ability to combine both organic and inorganic compounds and their propensity to either encapsulate or be engineered into unimolecular functional devices , dendrimers are versatile amongst existing nanoscale building blocks and materials.

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A novel reconfigurable, single feed, dual frequency, dualpolarized operation of a hexagonal slot-loaded square mwrostrip antenna is presented in this paper. A pin diode incorporated in the slot is used to switch the two operating frequencies considerably, without significantly affecting the radiation characteristics and gain. The proposed antenna provides a size reduction up to 61% and 26% Jor the two resonating frequencies, compared to standard rectangular patches. This design also gives considerable bandwidth up to 3.3% and 4.27%, for the two frequencies with a low operating frequency ratio

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We describe the synthesis of diblock and triblock copolymers by sequential atom transfer radical polymerization of styrene and acetoxymethylstyrene. Contrary to the usual block copolymerization involving isolation of the macroinitiator, a convenient one-pot procedure is developed. This is possible because of the preferential polymerization of acetoxymethylstyrene, even in the presence of residual styrene, as inferred from characterization of the intermediate polystyrenes and the block copolymers by size exclusion chromatography, 1H NMR, Fourier transform infrared spectroscopy, differential scanning calorimetry, and GPEC techniques. The latent acetoxy functionalities in these block copolymers are shown to be easily unmasked to OOH and OBr functionalities, with the potential for block ionomers and dense graft architectures.