5 resultados para LAYER THICKNESS

em Cochin University of Science


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In this thesis, a detailed attempt has been made to understand the general hydrography of the upper 300m of the water column, in the eastern Arabian Sea and the western Bay of Bengal, the two contrasting basins in the northern Indian Ocean, using recently collected data sets of Marine Research-Living Resources (MR-LR) assessment programme, funded by Department of Ocean Development, from various cruises, pertaining to different seasons. Initially it discuss the general hydrography of the west and east coasts of India are covered, in the context of mixed layer processes. The study describes the materials and methods . To compare the hydrography of the AS and BOB, a unique MLD(Mixed Layer Depth) definition for AS and BOB is essential, for which the 275 CTD profiles were used. A comparison has been made among the various MLD criteria with the actual MLD. The monthly evolution of MLD, barrier layer thickness and the role of atmospheric forcing on the dynamics of the mixed layer in the AS and BOB were studied. The general hydrography along the west coast of India is described. The upwelling/downwelling, winter cooling processes, in the context of chemical and biological parameters, are also addressed. Finally the general hydrography of the Bay of Bengal is covered. The most striking feature in the hydrography are the signature of an anticyclonic subtropical gyre during spring intermonsoon and a cold core eddy during winter monsoon. The TTS(Typical Tropical Structure) of the euphotic layer was also investigated.

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AC thin film electroluminescent devices of MIS and MISIM have been fabricated with a novel dielectric layer of Eu2O3 as an insulator. The threshold voltage for light emission is found to depend strongly on the frequency of excitation source in these devices. These devices are fabricated with an active layer of ZnS:Mn and a novel dielectric layer of Eu2O3 as an insulator. The observed frequency dependence of brightness-voltage characteristics has been explained on the basis of the loss characteristic of the insulator layer. Changes in the threshold voltage and brightness with variation in emitting or insulating film thickness have been investigated in metal-insulator-semiconductor (MIS) structures. It has been found that the decrease in brightness occurring with decreasing ZnS layer thickness can be compensated by an increase in brightness obtained by reducing the insulator thickness. The optimal condition for low threshold voltage and higher stability has been shown to occur when the active layer to insulator thickness ratio lies between one and two.

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In this work. Sub-micrometre thick CulnSe2 films were prepared using different techniques viz, selenization through chemically deposited Selenium and Sequential Elemental Evaporation. These methods are simpler than co-evaporation technique, which is known to be the most suitable one for CulnSe2 preparation. The films were optimized by varying the composition over a wide range to find optimum properties for device fabrication. Typical absorber layer thickness of today's solar cell ranges from 2-3m. Thinning of the absorber layer is one of the challenges to reduce the processing time and material usage, particularly of Indium. Here we made an attempt to fabricate solar cell with absorber layer of thickness layer, replacing toxic CdS.

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This thesis consists of a study of the effect of electrode films and overlayer films on the electrical properties of certain metal films. The films have been prepared on glass substrates by thermal evapouration in a vaccum 10 terr. The properties of Al films on Ag, Al,Au and Cu films on In electrodes ,and Bi/Ag bilayer films have been studied. The influence of annealing electrodes at higher temperature on the electrical properties of metal films has also been investigated. Further the effect of varying layer thickness in the bilayer films ,both annealed at higher temperature and annealed at room temperature have been examined.

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Present work deals with the Preparation and characterization of high-k aluminum oxide thin films by atomic layer deposition for gate dielectric applications.The ever-increasing demand for functionality and speed for semiconductor applications requires enhanced performance, which is achieved by the continuous miniaturization of CMOS dimensions. Because of this miniaturization, several parameters, such as the dielectric thickness, come within reach of their physical limit. As the required oxide thickness approaches the sub- l nm range, SiO 2 become unsuitable as a gate dielectric because its limited physical thickness results in excessive leakage current through the gate stack, affecting the long-term reliability of the device. This leakage issue is solved in the 45 mn technology node by the integration of high-k based gate dielectrics, as their higher k-value allows a physically thicker layer while targeting the same capacitance and Equivalent Oxide Thickness (EOT). Moreover, Intel announced that Atomic Layer Deposition (ALD) would be applied to grow these materials on the Si substrate. ALD is based on the sequential use of self-limiting surface reactions of a metallic and oxidizing precursor. This self-limiting feature allows control of material growth and properties at the atomic level, which makes ALD well-suited for the deposition of highly uniform and conformal layers in CMOS devices, even if these have challenging 3D topologies with high aspect-ratios. ALD has currently acquired the status of state-of-the-art and most preferred deposition technique, for producing nano layers of various materials of technological importance. This technique can be adapted to different situations where precision in thickness and perfection in structures are required, especially in the microelectronic scenario.