5 resultados para K plus current
em Cochin University of Science
Resumo:
National Institute for Interdisciplinary Science and Technology
Resumo:
Present work deals with the Preparation and characterization of high-k aluminum oxide thin films by atomic layer deposition for gate dielectric applications.The ever-increasing demand for functionality and speed for semiconductor applications requires enhanced performance, which is achieved by the continuous miniaturization of CMOS dimensions. Because of this miniaturization, several parameters, such as the dielectric thickness, come within reach of their physical limit. As the required oxide thickness approaches the sub- l nm range, SiO 2 become unsuitable as a gate dielectric because its limited physical thickness results in excessive leakage current through the gate stack, affecting the long-term reliability of the device. This leakage issue is solved in the 45 mn technology node by the integration of high-k based gate dielectrics, as their higher k-value allows a physically thicker layer while targeting the same capacitance and Equivalent Oxide Thickness (EOT). Moreover, Intel announced that Atomic Layer Deposition (ALD) would be applied to grow these materials on the Si substrate. ALD is based on the sequential use of self-limiting surface reactions of a metallic and oxidizing precursor. This self-limiting feature allows control of material growth and properties at the atomic level, which makes ALD well-suited for the deposition of highly uniform and conformal layers in CMOS devices, even if these have challenging 3D topologies with high aspect-ratios. ALD has currently acquired the status of state-of-the-art and most preferred deposition technique, for producing nano layers of various materials of technological importance. This technique can be adapted to different situations where precision in thickness and perfection in structures are required, especially in the microelectronic scenario.
Resumo:
The application vistas of superconductors have widened very much since the discovery of high TC superconductors (HTS) as many of the applications can be realised at 77 K rather than going down to 4.2 K, the liquid He temperature. One such application is the HTS current lead which is used to connect a superconducting system with a room temperature power source. Minimising heat leak to the cryogenic environment is the main advantage of introducing current leads into superconducting systems. The properties of HTSS likes zero resistance (avoiding joule heating) and very low thermal conductivity (minimized conductive heat transfer) make them ideal candidates to be used as current leads. There are two forms of HTS current leads. (i) bulk form (tube or rod) prepared either from YBCO or BSCCO and (ii) tape form prepared from Bi-2223 multifilamentary tapes. The tape form of current leads has many advantages with respect to the mechanical and thermal stability related criteria. Crucial information on various aspects of HTS current lead development are not available in the literature as those are kept proprietary by various companies around the world. The present work has been undertaken to tailor the properties of multifilamentary tapes for the current lead application and to optimise the processing parameters of the same for enhanced critical current density and field tolerance. Also it is the aim of the present investigation is to prepare prototype current leads engineered for operation in conduction cooled mode and test them for operational stability