5 resultados para Distortion Theorem

em Cochin University of Science


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Department of Physics, Cochin University of Science and Technology

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In Safety critical software failure can have a high price. Such software should be free of errors before it is put into operation. Application of formal methods in the Software Development Life Cycle helps to ensure that the software for safety critical missions are ultra reliable. PVS theorem prover, a formal method tool, can be used for the formal verification of software in ADA Language for Flight Software Application (ALFA.). This paper describes the modeling of ALFA programs for PVS theorem prover. An ALFA2PVS translator is developed which automatically converts the software in ALFA to PVS specification. By this approach the software can be verified formally with respect to underflow/overflow errors and divide by zero conditions without the actual execution of the code.

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In Safety critical software failure can have a high price. Such software should be free of errors before it is put into operation. Application of formal methods in the Software Development Life Cycle helps to ensure that the software for safety critical missions are ultra reliable. PVS theorem prover, a formal method tool, can be used for the formal verification of software in ADA Language for Flight Software Application (ALFA.). This paper describes the modeling of ALFA programs for PVS theorem prover. An ALFA2PVS translator is developed which automatically converts the software in ALFA to PVS specification. By this approach the software can be verified formally with respect to underflow/overflow errors and divide by zero conditions without the actual execution of the code

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This work presents a wideband low-distortion sigmadelta analog-to-digital converter (ADC) for Wireless Local Area Network (WLAN) standard. The proposed converter makes use of low-distortion swing suppression SDM architecture which is highly suitable for low oversampling ratios to attain high linearity over a wide bandwidth. The modulator employs a 2-2 cascaded sigma-delta modulator with feedforward path with a single-bit quantizer in the first stage and 4-bit in the second stage. The modulator is designed in TSMC 0.18um CMOS technology and operates at 1.8V supply voltage. Simulation results show that, a peak SNDR of 57dB and a spurious free dynamic range (SFDR) of 66dB is obtained for a 10MHz signal bandwidth, and an oversampling ratio of 8.