3 resultados para COVERED ALUMINUM ELECTRODES

em Cochin University of Science


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Dipyrromethene-Cu(II) derivatives possessing two dodecane alkyl chains have been used for the modification of gold electrodes. Electroactive host molecules have been incorporated into a lipophilic dodecanethiol SAM deposited onto gold electrodes through hydrophobic and van der Waals interactions (embedment technique). The presence of dipyrromethene-Cu(II) redox centers on the electrode surface was proved by cyclic voltammetry and Osteryoung square-wave voltammetry. The Au electrodes incorporating redox active Cu(II)-dipyrromethene SAMs were used for the direct voltammetric determination of paracetamol in human plasma.

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The main objective of this thesis work is to optimize the growth conditions for obtaining crystalline and conducting Lao.5Sro.5Co03 (LSCO) and Lao.5Sro.5Coo.5.5Nio.5O3 (LSCNO) thin films at low processing temperatures. The films are prepared by radio frequency magnetron sputtering under various deposition conditions. The thin films were used as electrodes for the fabrication of ferroelectric capacitors using BaO.7SrO.3 Ti03 (BST) and PbZro.52 Tio.4803 (PZT). The structural and transport properties of the La1_xSrxCo03 and Lao.5Sro.5Co1_xNix03 are also investigated. The characterization of the bulk and the thin films were performed using different tools. A powder X-ray diffractometer was used to analyze the crystalline nature of the material. The transport properties were investigated by measuring the temperature dependence of resistivity using a four probe technique. The magnetoresistance and thermoelectric power were also used to investigate the transport properties. Atomic force microscope was used to study the surface morphology and thin film roughness. The ferroelectric properties of the capacitors were investigated using RT66A ferroelectric tester.

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Present work deals with the Preparation and characterization of high-k aluminum oxide thin films by atomic layer deposition for gate dielectric applications.The ever-increasing demand for functionality and speed for semiconductor applications requires enhanced performance, which is achieved by the continuous miniaturization of CMOS dimensions. Because of this miniaturization, several parameters, such as the dielectric thickness, come within reach of their physical limit. As the required oxide thickness approaches the sub- l nm range, SiO 2 become unsuitable as a gate dielectric because its limited physical thickness results in excessive leakage current through the gate stack, affecting the long-term reliability of the device. This leakage issue is solved in the 45 mn technology node by the integration of high-k based gate dielectrics, as their higher k-value allows a physically thicker layer while targeting the same capacitance and Equivalent Oxide Thickness (EOT). Moreover, Intel announced that Atomic Layer Deposition (ALD) would be applied to grow these materials on the Si substrate. ALD is based on the sequential use of self-limiting surface reactions of a metallic and oxidizing precursor. This self-limiting feature allows control of material growth and properties at the atomic level, which makes ALD well-suited for the deposition of highly uniform and conformal layers in CMOS devices, even if these have challenging 3D topologies with high aspect-ratios. ALD has currently acquired the status of state-of-the-art and most preferred deposition technique, for producing nano layers of various materials of technological importance. This technique can be adapted to different situations where precision in thickness and perfection in structures are required, especially in the microelectronic scenario.