Nutrient Dynamics in the EEZ of the West Coast of India with Special Reference to the Oxygen Minimum Zone and Denitrification

The present work aims at deciphering the processes that control the nutrient distribution along the EEZ (Exclusive Economic Zone of India) of the west coast of India and to bring out its linkage with primary and secondary productivity. This work assume utmost importance as very few studies have hitherto focused entirely on the EEZ of the west coast of India to address the biochemical responses brought about by monsoons. The present study examines the seasonal variations in physicochemical parameters and associated primary biological responses along the west coast of India. This study targets to measure and understand the shelf ocean exchange in a typical coastal upwelling region of the southeast Arabian Sea, and the influence of convective mixing along the northern part of the west coast of India. The study focuses more directly on coastal upwelling along the southwest coast of India, within the EEZ. The effects of coastal upwelling, eddy formation and the offshore advection are apparent in the present investigation. This has consequences to fisheries and climate, in energy transfer to the food chain and the increased sequestering of carbon in the ocean. The study also focuses on the Oxygen Minimum Zone (OMZ) and dentrification observed along the EEZ of the west coast of India on a seasonal scale. In the study, an attempt is also made to demarcate the geographical boundaries of the denitrification zone in the EEZ of India and on the nature and magnitude of these variations, on a seasonal and inter annual scales

Design and synthesis of efficient mac architectures for high speed decimal processor

Most of the commercial and financial data are stored in decimal fonn. Recently, support for decimal arithmetic has received increased attention due to the growing importance in financial analysis, banking, tax calculation, currency conversion, insurance, telephone billing and accounting. Performing decimal arithmetic with systems that do not support decimal computations may give a result with representation error, conversion error, and/or rounding error. In this world of precision, such errors are no more tolerable. The errors can be eliminated and better accuracy can be achieved if decimal computations are done using Decimal Floating Point (DFP) units. But the floating-point arithmetic units in today's general-purpose microprocessors are based on the binary number system, and the decimal computations are done using binary arithmetic. Only few common decimal numbers can be exactly represented in Binary Floating Point (BF P). ln many; cases, the law requires that results generated from financial calculations performed on a computer should exactly match with manual calculations. Currently many applications involving fractional decimal data perform decimal computations either in software or with a combination of software and hardware. The performance can be dramatically improved by complete hardware DFP units and this leads to the design of processors that include DF P hardware.VLSI implementations using same modular building blocks can decrease system design and manufacturing cost. A multiplexer realization is a natural choice from the viewpoint of cost and speed.This thesis focuses on the design and synthesis of efficient decimal MAC (Multiply ACeumulate) architecture for high speed decimal processors based on IEEE Standard for Floating-point Arithmetic (IEEE 754-2008). The research goal is to design and synthesize deeimal'MAC architectures to achieve higher performance.Efficient design methods and architectures are developed for a high performance DFP MAC unit as part of this research.

High performance, low latency double digit decimal multiplier on ASIC and FPGA

Decimal multiplication is an integral part of financial, commercial, and internet-based computations. This paper presents a novel double digit decimal multiplication (DDDM) technique that offers low latency and high throughput. This design performs two digit multiplications simultaneously in one clock cycle. Double digit fixed point decimal multipliers for 7digit, 16 digit and 34 digit are simulated using Leonardo Spectrum from Mentor Graphics Corporation using ASIC Library. The paper also presents area and delay comparisons for these fixed point multipliers on Xilinx, Altera, Actel and Quick logic FPGAs. This multiplier design can be extended to support decimal floating point multiplication for IEEE 754- 2008 standard.

Virulence Potential And Antibiotic Susceptibility Pattern Of Motile Aeromonads Associated With Freshwater Ornamental Fish Culture Systems: A Possible Threat To public Health

Aeromonas spp. are ubiquitous aquatic organisms, associated with multitude of diseases in several species of animals, including fishes and humans. In the present study, water samples from two ornamental fish culture systems were analyzed for the presence of Aeromonas. Nutrient agar was used for Aeromonas isolation, and colonies (60 No) were identified through biochemical characterization. Seven clusters could be generated based on phenotypic characters, analyzed by the programme NTSYSpc, Version 2.02i, and identified as: Aeromonas caviae (33.3%), A. jandaei (38.3%) and A. veronii biovar sobria (28.3%). The strains isolated produced highly active hydrolytic enzymes, haemolytic activity and slime formation in varying proportions. The isolates were also tested for the enterotoxin genes (act, alt and ast), haemolytic toxins (hlyA and aerA), involved in type 3 secretion system (TTSS: ascV, aexT, aopP, aopO, ascF–ascG, and aopH), and glycerophospholipid-cholesterol acyltransferase (gcat). All isolates were found to be associated with at least one virulent gene. Moreover, they were resistant to frequently used antibiotics for human infections. The study demonstrates the pathogenic potential of Aeromonas, associated with ornamental fish culture systems suggesting the emerging threat to public health