Modeling of temperature regimes in a furnace of bubbling fluidized bed boiler

The work is mainly focused on the technology of bubbling fluidized bed combustion. Heat transfer and hydrodynamics of the process were examined in the work in detail. Special emphasis was placed on the process of heat exchange in a freeboard zone of bubbling fluidized bed boiler. Operating mode of bubbling fluidized bed boiler depends on many parameters. To assess the influence of some parameters on a temperature regime inside the furnace a simplified method of zonal modeling was used in the work. Thus, effects of bed material fineness, excess air ratio and changes in boiler load were studied. Besides the technology of combustion in bubbling fluidized bed, other common technologies of solid fuels combustion were reviewed. In addition, brief survey of most widely used types of solid fuel was performed in the work.

Varaavan tulisijan lämmönsiirron tutkiminen

Tulisijojen tekniikkaan kohdistuu yhä kovempia vaatimuksia sekä kuluttajien että myös erityisesti viranomaismääräysten suunnalta. Tämän työn tarkoituksena on osaltaan luoda pohjaa näiden vaatimusten täyttämiselle. Työn tavoitteena oli määrittää lämmönsiirtokerroin tyypillisen vuolukivirakenteisen tulisijan poskikanavassa savukaasun ja kanavan seinämän välillä. Työ koostuu mittauslaitteen suunnittelusta, käytännön mittauksista ja mittaustulosten analysoinnista teoriaan verrattuina. Työ pohjautuu käytännön mittauksiin kahdella koeuunilla. Mittaukset kohdistuivat uunien poskikanavissa ja poskikanavan seinämissä tapahtuviin lämpötilamuutoksiin. Toisessa koeuunissa mitattiin myös poskikanavan savukaasun lämpötilajakauma. Mittauksilla saatua sekä teoreettisesti määritettyä lämpötilajakaumaa verrattiin toisiinsa. Lämmönsiirtokertoimet määritettiin lämpötilojen ja savukaasun massavirran perusteella. Tuloksena saatiin paikalliset sekä yleispätevät lämmönsiirtokertoimet savukaasun lämpötilan funktiona.

Development of Furnace Model for Bubbling Fluidized Bed Boiler

The aim of this thesis was to develop a model, which can predict heat transfer, heat release distribution and vertical temperature profile of gas phase in the furnace of a bubbling fluidized bed (BFB) boiler. The model is based on three separate model components that take care of heat transfer, heat release distribution and mass and energy balance calculations taking into account the boiler design and operating conditions. The model was successfully validated by solving the model parameters on the basis of commercial size BFB boiler test run information and by performing parametric studies with the model. Implementation of the developed model for the Foster Wheeler BFB design procedures will require model validation with existing BFB database and possibly more detailed measurements at the commercial size BFB boilers.

Thermal-Aware Networked Many-Core Systems

Advancements in IC processing technology has led to the innovation and growth happening in the consumer electronics sector and the evolution of the IT infrastructure supporting this exponential growth. One of the most difficult obstacles to this growth is the removal of large amount of heatgenerated by the processing and communicating nodes on the system. The scaling down of technology and the increase in power density is posing a direct and consequential effect on the rise in temperature. This has resulted in the increase in cooling budgets, and affects both the life-time reliability and performance of the system. Hence, reducing on-chip temperatures has become a major design concern for modern microprocessors. This dissertation addresses the thermal challenges at different levels for both 2D planer and 3D stacked systems. It proposes a self-timed thermal monitoring strategy based on the liberal use of on-chip thermal sensors. This makes use of noise variation tolerant and leakage current based thermal sensing for monitoring purposes. In order to study thermal management issues from early design stages, accurate thermal modeling and analysis at design time is essential. In this regard, spatial temperature profile of the global Cu nanowire for on-chip interconnects has been analyzed. It presents a 3D thermal model of a multicore system in order to investigate the effects of hotspots and the placement of silicon die layers, on the thermal performance of a modern ip-chip package. For a 3D stacked system, the primary design goal is to maximise the performance within the given power and thermal envelopes. Hence, a thermally efficient routing strategy for 3D NoC-Bus hybrid architectures has been proposed to mitigate on-chip temperatures by herding most of the switching activity to the die which is closer to heat sink. Finally, an exploration of various thermal-aware placement approaches for both the 2D and 3D stacked systems has been presented. Various thermal models have been developed and thermal control metrics have been extracted. An efficient thermal-aware application mapping algorithm for a 2D NoC has been presented. It has been shown that the proposed mapping algorithm reduces the effective area reeling under high temperatures when compared to the state of the art.

Power cycling lifetime estimation of IGBT power modules based on chip temperature modeling

In this doctoral thesis, methods to estimate the expected power cycling life of power semiconductor modules based on chip temperature modeling are developed. Frequency converters operate under dynamic loads in most electric drives. The varying loads cause thermal expansion and contraction, which stresses the internal boundaries between the material layers in the power module. Eventually, the stress wears out the semiconductor modules. The wear-out cannot be detected by traditional temperature or current measurements inside the frequency converter. Therefore, it is important to develop a method to predict the end of the converter lifetime. The thesis concentrates on power-cycling-related failures of insulated gate bipolar transistors. Two types of power modules are discussed: a direct bonded copper (DBC) sandwich structure with and without a baseplate. Most common failure mechanisms are reviewed, and methods to improve the power cycling lifetime of the power modules are presented. Power cycling curves are determined for a module with a lead-free solder by accelerated power cycling tests. A lifetime model is selected and the parameters are updated based on the power cycling test results. According to the measurements, the factor of improvement in the power cycling lifetime of modern IGBT power modules is greater than 10 during the last decade. Also, it is noticed that a 10 C increase in the chip temperature cycle amplitude decreases the lifetime by 40%. A thermal model for the chip temperature estimation is developed. The model is based on power loss estimation of the chip from the output current of the frequency converter. The model is verified with a purpose-built test equipment, which allows simultaneous measurement and simulation of the chip temperature with an arbitrary load waveform. The measurement system is shown to be convenient for studying the thermal behavior of the chip. It is found that the thermal model has a 5 C accuracy in the temperature estimation. The temperature cycles that the power semiconductor chip has experienced are counted by the rainflow algorithm. The counted cycles are compared with the experimentally verified power cycling curves to estimate the life consumption based on the mission profile of the drive. The methods are validated by the lifetime estimation of a power module in a direct-driven wind turbine. The estimated lifetime of the IGBT power module in a direct-driven wind turbine is 15 000 years, if the turbine is located in south-eastern Finland.