9 resultados para Virtual power

em Doria (National Library of Finland DSpace Services) - National Library of Finland, Finland


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Työssä tarkasteltiin älykkäiden sähköverkkojen näkökulmasta, millaisia toiminnallisuuksia kiinteistöautomaatiojärjestelmiltä odotetaan ja miten markkinoilla olevat järjestelmät vastaavat näihin odotuksiin. Lisäksi arvioitiin, kuinka taloudellisesti kannattavia valittuihin automaatiojärjestelmiin kuuluvat energian käytön hallintaan liittyvät toiminnallisuudet ovat sähkönkäyttäjien näkökulmasta. Lopuksi tehtiin lyhyt katsaus kiinteistöautomaatiojärjestelmien tulevaisuuden näkymiin. Kiinteistöautomaatiolla voidaan vaikuttaa energian käytön tehokkuuteen ohjaamalla esimerkiksi valaistusta, ilmanvaihtoa, ilmastointia, lämmitystä ja sähkölaitteita. Eräs vaihtoehto on toteuttaa ohjauksen avulla markkinapohjaista kysyntäjoustoa, jossa kiinteistön sähköjärjestelmän toimintaa säädetään sähkön hinnan perusteella. Kiinteistössä tulee myös voida tehdä laitekohtaisia energiankulutuksen mittauksia, jotka antavat tietoa sähkönkäyttäjille eri laitteiden sähkönkulutuksesta. Kiinteistöautomaation ja sähkön pientuotannon yleistymisen myötä on myös etähallittavien virtuaalivoimaloiden toteuttaminen tulossa mahdolliseksi. Lisäksi laskettiin sähkönkäyttäjän kannalta lämmityksen, valaistuksen ja ilmanvaihdon ohjauksen kannattavuutta ja selvitettiin, että tutkituissa esimerkkijärjestelmissä suurin säästöpotentiaali on lämmityksen ohjauksessa.

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Line converters have become an attractive AC/DC power conversion solution in industrial applications. Line converters are based on controllable semiconductor switches, typically insulated gate bipolar transistors. Compared to the traditional diode bridge-based power converters line converters have many advantageous characteristics, including bidirectional power flow, controllable de-link voltage and power factor and sinusoidal line current. This thesis considers the control of the lineconverter and its application to power quality improving. The line converter control system studied is based on the virtual flux linkage orientation and the direct torque control (DTC) principle. A new DTC-based current control scheme is introduced and analyzed. The overmodulation characteristics of the DTC converter are considered and an analytical equation for the maximum modulation index is derived. The integration of the active filtering features to the line converter isconsidered. Three different active filtering methods are implemented. A frequency-domain method, which is based on selective harmonic sequence elimination, anda time-domain method, which is effective in a wider frequency band, are used inharmonic current compensation. Also, a voltage feedback active filtering method, which mitigates harmonic sequences of the grid voltage, is implemented. The frequency-domain and the voltage feedback active filtering control systems are analyzed and controllers are designed. The designs are verified with practical measurements. The performance and the characteristics of the implemented active filtering methods are compared and the effect of the L- and the LCL-type line filteris discussed. The importance of the correct grid impedance estimate in the voltage feedback active filter control system is discussed and a new measurement-based method to obtain it is proposed. Also, a power conditioning system (PCS) application of the line converter is considered. A new method for correcting the voltage unbalance of the PCS-fed island network is proposed and experimentally validated.

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Multiprocessing is a promising solution to meet the requirements of near future applications. To get full benefit from parallel processing, a manycore system needs efficient, on-chip communication architecture. Networkon- Chip (NoC) is a general purpose communication concept that offers highthroughput, reduced power consumption, and keeps complexity in check by a regular composition of basic building blocks. This thesis presents power efficient communication approaches for networked many-core systems. We address a range of issues being important for designing power-efficient manycore systems at two different levels: the network-level and the router-level. From the network-level point of view, exploiting state-of-the-art concepts such as Globally Asynchronous Locally Synchronous (GALS), Voltage/ Frequency Island (VFI), and 3D Networks-on-Chip approaches may be a solution to the excessive power consumption demanded by today’s and future many-core systems. To this end, a low-cost 3D NoC architecture, based on high-speed GALS-based vertical channels, is proposed to mitigate high peak temperatures, power densities, and area footprints of vertical interconnects in 3D ICs. To further exploit the beneficial feature of a negligible inter-layer distance of 3D ICs, we propose a novel hybridization scheme for inter-layer communication. In addition, an efficient adaptive routing algorithm is presented which enables congestion-aware and reliable communication for the hybridized NoC architecture. An integrated monitoring and management platform on top of this architecture is also developed in order to implement more scalable power optimization techniques. From the router-level perspective, four design styles for implementing power-efficient reconfigurable interfaces in VFI-based NoC systems are proposed. To enhance the utilization of virtual channel buffers and to manage their power consumption, a partial virtual channel sharing method for NoC routers is devised and implemented. Extensive experiments with synthetic and real benchmarks show significant power savings and mitigated hotspots with similar performance compared to latest NoC architectures. The thesis concludes that careful codesigned elements from different network levels enable considerable power savings for many-core systems.

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This thesis presents a novel design paradigm, called Virtual Runtime Application Partitions (VRAP), to judiciously utilize the on-chip resources. As the dark silicon era approaches, where the power considerations will allow only a fraction chip to be powered on, judicious resource management will become a key consideration in future designs. Most of the works on resource management treat only the physical components (i.e. computation, communication, and memory blocks) as resources and manipulate the component to application mapping to optimize various parameters (e.g. energy efficiency). To further enhance the optimization potential, in addition to the physical resources we propose to manipulate abstract resources (i.e. voltage/frequency operating point, the fault-tolerance strength, the degree of parallelism, and the configuration architecture). The proposed framework (i.e. VRAP) encapsulates methods, algorithms, and hardware blocks to provide each application with the abstract resources tailored to its needs. To test the efficacy of this concept, we have developed three distinct self adaptive environments: (i) Private Operating Environment (POE), (ii) Private Reliability Environment (PRE), and (iii) Private Configuration Environment (PCE) that collectively ensure that each application meets its deadlines using minimal platform resources. In this work several novel architectural enhancements, algorithms and policies are presented to realize the virtual runtime application partitions efficiently. Considering the future design trends, we have chosen Coarse Grained Reconfigurable Architectures (CGRAs) and Network on Chips (NoCs) to test the feasibility of our approach. Specifically, we have chosen Dynamically Reconfigurable Resource Array (DRRA) and McNoC as the representative CGRA and NoC platforms. The proposed techniques are compared and evaluated using a variety of quantitative experiments. Synthesis and simulation results demonstrate VRAP significantly enhances the energy and power efficiency compared to state of the art.

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