11 resultados para MUON NEUTRINO

em Doria (National Library of Finland DSpace Services) - National Library of Finland, Finland


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CERNin tutkimuskeskuksen rakenteilla olevan hadronikiihdyttimen eräs tarkoitus on todistaa Higgsin bosonin olemassaolo. Higgsin bosonin löytyminen yhtenäistäisi nykyisen hiukkasfysiikan teorian ja antaisi selityksen sille kuinka hiukkaset saavat massansa. Kiihdyttimen CMS koeasema on tarkoitettu erityisesti myonien ilmaisuun. Tämä työ liittyy CMS koeaseman RPC-ilmaisintyypin linkkijärjestelmään, jonka tarkoituksena on käsitellä ilmaisimelta tulevia myonien aiheuttamia signaaleja ja lähettää tiedot tärkeäksi katsotuista törmäystapahtumista tallennettavaksi analysointia varten. Työssä on toteutettu linkkijärjestelmän ohjaus- ja linkkikorteille testiympäristö, jolla voidaan todeta järjestelmän eri osien keskinäinen yhteensopivuus ja toimivuus. Työn alkuosassa esitellään ilmaisimen linkkijärjestelmän eri osat ja niiden merkitykset. Työn loppuosassa käydään läpi eri testimenetelmiä ja analysoidaan niiden antamia tuloksia.

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Euroopan hiukkastutkimuslaitoksen CERNin rakenteilla olevan LHC-hiukkaskiihdyttimen CMS-koeasema on tarkoitettu erityisesti myonin ilmaisuun. Tässä työssä on esitelty CMS-koeaseman RPC-ilmaisintyypin linkkijärjestelmä ja sen testaamiseen tarkoitetut laitteet sekä laitteiden testaamiseen tarvittavat ohjelmistot. Työssä on selvitetty ohjelmien toimivuus ja keskinäinen yhteensopivuus.

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Työssä suunniteltiin ja toteutettiin linkkikorttien tuotannollinen testeri. Linkkikortti on osa CERN:iin rakennettavan hiukkaskiihdyttimen Large Hadron Colliderin koeasema Compact Muon Solenoidin luentajärjestelmää. Linkkikortin tehtävänä on muuttaa rinnakkaismuotoinen LVDS-signaali sarjamuotoiseksi optiseksi signaaliksi. Testattaessa testeri ja linkkikortti sijoitetaan kehikkoon, joten testerin liittimien pitää olla linkkikortin liittimien kanssa identtisiä. Testerin lähdöt ovat linkkikortin tuloja ja toisinpäin. Tällöin testattaessa voidaan ohjelmoitavien FPGA-piirien avulla lähettää signaalia kortilta toiselle. Vastaanottavan kortin FPGA-piirin avulla voidaan tarkistaa, onko data tullut perille muuttumattomana. Testin ohjaus tapahtuu tietokoneella, jolla käyttäjä antaa käskyn testin aloittamisesta ja jonne lopulta myös raportoidaan testin tulokset. Testien tulokset näytetään myös testerin ledeillä. Työssä ei pystytä linkkikorttien puuttumisen takia testaamaan testeriä loppukäytössään. Kuitenkin testerin toimivuus pystyttiin suurilta osin testaamaan, jolloin saatiin odotettuja tuloksia.

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Tässä diplomityössä suunnitellaan CERN:in (Conseil Europëen pour la Recherche Nuclëaire) Compact Muon Solenoid –nimiseen hiukkasilmaisinjärjestelmään laite, joka monistaa 1.6 Gbit/s nopeudella saapuvia optisia signaaleja useaan eri kohteeseen. Aluksi suunnitellaan ja rakennetaan testauslaite, jonka avulla tutkitaan eri komponenttien soveltuvuutta laitteistoon. Lisäksi testauslaitteella haetaan laserohjaimille ja vastaanottimille sopivia säätöarvoja. Testauslaitteesta saatujen kokemusten perusteella suunnitellaan ja rakennetaan signaalinmonistinlaitteisto, johon tuodaan useita satoja erillisiä signaaleja. Jokainen näistä signaaleista monistetaan joko kahdeksi tai neljäksi lähteväksi signaaliksi. Lopuksi testauslaitteella tutkitaan signaalinmonistinlaitteiston toimintaa ja luotettavuutta.

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The large hadron collider constructed at the European organization for nuclear research, CERN, is the world’s largest single measuring instrument ever built, and also currently the most powerful particle accelerator that exists. The large hadron collider includes six different experiment stations, one of which is called the compact muon solenoid, or the CMS. The main purpose of the CMS is to track and study residue particles from proton-proton collisions. The primary detectors utilized in the CMS are resistive plate chambers (RPCs). To obtain data from these detectors, a link system has been designed. The main idea of the link system is to receive data from the detector front-end electronics in parallel form, and to transmit it onwards in serial form, via an optical fiber. The system is mostly ready and in place. However, a problem has occurred with innermost RPC detectors, located in sector labeled RE1/1; transmission lines for parallel data suffer from signal integrity issues over long distances. As a solution to this, a new version of the link system has been devised, a one that fits in smaller space and can be located within the CMS, closer to the detectors. This RE1/1 link system has been so far completed only partially, with just the mechanical design and casing being done. In this thesis, link system electronics for RE1/1 sector has been designed, by modifying the existing link system concept to better meet the requirements of the RE1/1 sector. In addition to completion of the prototype of the RE1/1 link system electronics, some testing for the system has also been done, to ensure functionality of the design.

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The purpose of the work was to realize a high-speed digital data transfer system for RPC muon chambers in the CMS experiment on CERN’s new LHC accelerator. This large scale system took many years and many stages of prototyping to develop, and required the participation of tens of people. The system interfaces to Frontend Boards (FEB) at the 200,000-channel detector and to the trigger and readout electronics in the control room of the experiment. The distance between these two is about 80 metres and the speed required for the optic links was pushing the limits of available technology when the project was started. Here, as in many other aspects of the design, it was assumed that the features of readily available commercial components would develop in the course of the design work, just as they did. By choosing a high speed it was possible to multiplex the data from some the chambers into the same fibres to reduce the number of links needed. Further reduction was achieved by employing zero suppression and data compression, and a total of only 660 optical links were needed. Another requirement, which conflicted somewhat with choosing the components a late as possible was that the design needed to be radiation tolerant to an ionizing dose of 100 Gy and to a have a moderate tolerance to Single Event Effects (SEEs). This required some radiation test campaigns, and eventually led to ASICs being chosen for some of the critical parts. The system was made to be as reconfigurable as possible. The reconfiguration needs to be done from a distance as the electronics is not accessible except for some short and rare service breaks once the accelerator starts running. Therefore reconfigurable logic is extensively used, and the firmware development for the FPGAs constituted a sizable part of the work. Some special techniques needed to be used there too, to achieve the required radiation tolerance. The system has been demonstrated to work in several laboratory and beam tests, and now we are waiting to see it in action when the LHC will start running in the autumn 2008.

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The Standard Model of particle physics is currently the best description of fundamental particles and their interactions. All particles save the Higgs boson have been observed in particle accelerator experiments over the years. Despite the predictive power the Standard Model there are many phenomena that the scenario does not predict or explain. Among the most prominent dilemmas is matter-antimatter asymmetry, and much effort has been made in formulating scenarios that accurately predict the correct amount of matter-antimatter asymmetry in the universe. One of the most appealing explanations is baryogenesis via leptogenesis which not only serves as a mechanism of producing excess matter over antimatter but can also explain why neutrinos have very small non-zero masses. Interesting leptogenesis scenarios arise when other possible candidates of theories beyond the Standard Model are brought into the picture. In this thesis, we have studied leptogenesis in an extra dimensional framework and in a modified version of supersymmetric Standard Model. The first chapters of this thesis introduce the standard cosmological model, observations made on the photon to baryon ratio and necessary preconditions for successful baryogenesis. Baryogenesis via leptogenesis is then introduced and its connection to neutrino physics is illuminated. The final chapters concentrate on extra dimensional theories and supersymmetric models and their ability to accommodate leptogenesis. There, the results of our research are also presented.

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The European Organization for Nuclear Research (CERN) operates the largest particle collider in the world. This particle collider is called the Large Hadron Collider (LHC) and it will undergo a maintenance break sometime in 2017 or 2018. During the break, the particle detectors, which operate around the particle collider, will be serviced and upgraded. Following the improvement in performance of the particle collider, the requirements for the detector electronics will be more demanding. In particular, the high amount of radiation during the operation of the particle collider sets requirements for the electronics that are uncommon in commercial electronics. Electronics that are built to function in the challenging environment of the collider have been designed at CERN. In order to meet the future challenges of data transmission, a GigaBit Transceiver data transmission module and an E-Link data bus have been developed. The next generation of readout electronics is designed to benefit from these technologies. However, the current readout electronics chips are not compatible with these technologies. As a result, in addition to new Gas Electron Multiplier (GEM) detectors and other technology, a new compatible chip is developed to function within the GEMs for the Compact Muon Solenoid (CMS) project. In this thesis, the objective was to study a data transmission interface that will be located on the readout chip between the E-Link bus and the control logic of the chip. The function of the module is to handle data transmission between the chip and the E-Link. In the study, a model of the interface was implemented with the Verilog hardware description language. This process was simulated by using chip design software by Cadence. State machines and operating principles with alternative possibilities for implementation are introduced in the E-Link interface design procedure. The functionality of the designed logic is demonstrated in simulation results, in which the implemented model is proven to be suitable for its task. Finally, suggestions that should be considered for improving the design have been presented.

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This Master’s Thesis is dedicated to the simulation of new p-type pixel strip detector with enhanced multiplication effect. It is done for high-energy physics experiments upgrade such as Super Large Hadron Collider especially for Compact Muon Solenoid particle track silicon detectors. These detectors are used in very harsh radiation environment and should have good radiation hardness. The device engineering technology for developing more radiation hard particle detectors is used for minimizing the radiation degradation. New detector structure with enhanced multiplication effect is proposed in this work. There are studies of electric field and electric charge distribution of conventional and new p-type detector under reverse voltage bias and irradiation. Finally, the dependence of the anode current from the applied cathode reverse voltage bias under irradiation is obtained in this Thesis. For simulation Silvaco Technology Computer Aided Design software was used. Athena was used for creation of doping profiles and device structures and Atlas was used for getting electrical characteristics of the studied devices. The program codes for this software are represented in Appendixes.

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The Large Hadron Collider (LHC) in The European Organization for Nuclear Research (CERN) will have a Long Shutdown sometime during 2017 or 2018. During this time there will be maintenance and a possibility to install new detectors. After the shutdown the LHC will have a higher luminosity. A promising new type of detector for this high luminosity phase is a Triple-GEM detector. During the shutdown these detectors will be installed at the Compact Muon Solenoid (CMS) experiment. The Triple-GEM detectors are now being developed at CERN and alongside also a readout ASIC chip for the detector. In this thesis a simulation model was developed for the ASICs analog front end. The model will help to carry out more extensive simulations and also simulate the whole chip before the whole design is finished. The proper functioning of the model was tested with simulations, which are also presented in the thesis.