84 resultados para DC-AC Inverters
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Permanent magnet generators (PMG) represent the cutting edge technology in modern wind mills. The efficiency remains high (over 90%) at partial loads. To improve the machine efficiency even further, every aspect of machine losses has to be analyzed. Additional losses are often given as a certain percentage without providing any detailed information about the actual calculation process; meanwhile, there are many design-dependent losses that have an effect on the total amount of additional losses and that have to be taken into consideration. Additional losses are most often eddy current losses in different parts of the machine. These losses are usually difficult to calculate in the design process. In this doctoral thesis, some additional losses are identified and modeled. Further, suggestions on how to minimize the losses are given. Iron losses can differ significantly between the measured no-load values and the loss values under load. In addition, with embedded magnet rotors, the quadrature-axis armature reaction adds losses to the stator iron by manipulating the harmonic content of the flux. It was, therefore, re-evaluated that in salient pole machines, to minimize the losses and the loss difference between the no-load and load operation, the flux density has to be kept below 1.5 T in the stator yoke, which is the traditional guideline for machine designers. Eddy current losses may occur in the end-winding area and in the support structure of the machine, that is, in the finger plate and the clamping ring. With construction steel, these losses account for 0.08% of the input power of the machine. These losses can be reduced almost to zero by using nonmagnetic stainless steel. In addition, the machine housing may be subjected to eddy current losses if the flux density exceeds 1.5 T in the stator yoke. Winding losses can rise rapidly when high frequencies and 10–15 mm high conductors are used. In general, minimizing the winding losses is simple. For example, it can be done by dividing the conductor into transposed subconductors. However, this comes with the expense of an increase in the DC resistance. In the doctoral thesis, a new method is presented to minimize the winding losses by applying a litz wire with noninsulated strands. The construction is the same as in a normal litz wire but the insulation between the subconductors has been left out. The idea is that the connection is kept weak to prevent harmful eddy currents from flowing. Moreover, the analytical solution for calculating the AC resistance factor of the litz-wire is supplemented by including an end-winding resistance in the analytical solution. A simple measurement device is developed to measure the AC resistance in the windings. In the case of a litz-wire with originally noninsulated strands, vacuum pressure impregnation (VPI) is used to insulate the subconductors. In one of the two cases studied, the VPI affected the AC resistance factor, but in the other case, it did not have any effect. However, more research is needed to determine the effect of the VPI on litz-wire with noninsulated strands. An empirical model is developed to calculate the AC resistance factor of a single-layer formwound winding. The model includes the end-winding length and the number of strands and turns. The end winding includes the circulating current (eddy currents that are traveling through the whole winding between parallel strands) and the main current. The end-winding length also affects the total AC resistance factor.
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This doctoral thesis introduces an improved control principle for active du/dt output filtering in variable-speed AC drives, together with performance comparisons with previous filtering methods. The effects of power semiconductor nonlinearities on the output filtering performance are investigated. The nonlinearities include the timing deviation and the voltage pulse waveform distortion in the variable-speed AC drive output bridge. Active du/dt output filtering (ADUDT) is a method to mitigate motor overvoltages in variable-speed AC drives with long motor cables. It is a quite recent addition to the du/dt reduction methods available. This thesis improves on the existing control method for the filter, and concentrates on the lowvoltage (below 1 kV AC) two-level voltage-source inverter implementation of the method. The ADUDT uses narrow voltage pulses having a duration in the order of a microsecond from an IGBT (insulated gate bipolar transistor) inverter to control the output voltage of a tuned LC filter circuit. The filter output voltage has thus increased slope transition times at the rising and falling edges, with an opportunity of no overshoot. The effect of the longer slope transition times is a reduction in the du/dt of the voltage fed to the motor cable. Lower du/dt values result in a reduction in the overvoltage effects on the motor terminals. Compared with traditional output filtering methods to accomplish this task, the active du/dt filtering provides lower inductance values and a smaller physical size of the filter itself. The filter circuit weight can also be reduced. However, the power semiconductor nonlinearities skew the filter control pulse pattern, resulting in control deviation. This deviation introduces unwanted overshoot and resonance in the filter. The controlmethod proposed in this thesis is able to directly compensate for the dead time-induced zero-current clamping (ZCC) effect in the pulse pattern. It gives more flexibility to the pattern structure, which could help in the timing deviation compensation design. Previous studies have shown that when a motor load current flows in the filter circuit and the inverter, the phase leg blanking times distort the voltage pulse sequence fed to the filter input. These blanking times are caused by excessively large dead time values between the IGBT control pulses. Moreover, the various switching timing distortions, present in realworld electronics when operating with a microsecond timescale, bring additional skew to the control. Left uncompensated, this results in distortion of the filter input voltage and a filter self-induced overvoltage in the form of an overshoot. This overshoot adds to the voltage appearing at the motor terminals, thus increasing the transient voltage amplitude at the motor. This doctoral thesis investigates the magnitude of such timing deviation effects. If the motor load current is left uncompensated in the control, the filter output voltage can overshoot up to double the input voltage amplitude. IGBT nonlinearities were observed to cause a smaller overshoot, in the order of 30%. This thesis introduces an improved ADUDT control method that is able to compensate for phase leg blanking times, giving flexibility to the pulse pattern structure and dead times. The control method is still sensitive to timing deviations, and their effect is investigated. A simple approach of using a fixed delay compensation value was tried in the test setup measurements. The ADUDT method with the new control algorithm was found to work in an actual motor drive application. Judging by the simulation results, with the delay compensation, the method should ultimately enable an output voltage performance and a du/dt reduction that are free from residual overshoot effects. The proposed control algorithm is not strictly required for successful ADUDT operation: It is possible to precalculate the pulse patterns by iteration and then for instance store them into a look-up table inside the control electronics. Rather, the newly developed control method is a mathematical tool for solving the ADUDT control pulses. It does not contain the timing deviation compensation (from the logic-level command to the phase leg output voltage), and as such is not able to remove the timing deviation effects that cause error and overshoot in the filter. When the timing deviation compensation has to be tuned-in in the control pattern, the precalculated iteration method could prove simpler and equally good (or even better) compared with the mathematical solution with a separate timing compensation module. One of the key findings in this thesis is the conclusion that the correctness of the pulse pattern structure, in the sense of ZCC and predicted pulse timings, cannot be separated from the timing deviations. The usefulness of the correctly calculated pattern is reduced by the voltage edge timing errors. The doctoral thesis provides an introductory background chapter on variable-speed AC drives and the problem of motor overvoltages and takes a look at traditional solutions for overvoltage mitigation. Previous results related to the active du/dt filtering are discussed. The basic operation principle and design of the filter have been studied previously. The effect of load current in the filter and the basic idea of compensation have been presented in the past. However, there was no direct way of including the dead time in the control (except for solving the pulse pattern manually by iteration), and the magnitude of nonlinearity effects had not been investigated. The enhanced control principle with the dead time handling capability and a case study of the test setup timing deviations are the main contributions of this doctoral thesis. The simulation and experimental setup results show that the proposed control method can be used in an actual drive. Loss measurements and a comparison of active du/dt output filtering with traditional output filtering methods are also presented in the work. Two different ADUDT filter designs are included, with ferrite core and air core inductors. Other filters included in the tests were a passive du/dtfilter and a passive sine filter. The loss measurements incorporated a silicon carbide diode-equipped IGBT module, and the results show lower losses with these new device technologies. The new control principle was measured in a 43 A load current motor drive system and was able to bring the filter output peak voltage from 980 V (the previous control principle) down to 680 V in a 540 V average DC link voltage variable-speed drive. A 200 m motor cable was used, and the filter losses for the active du/dt methods were 111W–126 W versus 184 W for the passive du/dt. In terms of inverter and filter losses, the active du/dt filtering method had a 1.82-fold increase in losses compared with an all-passive traditional du/dt output filter. The filter mass with the active du/dt method was 17% (2.4 kg, air-core inductors) compared with 14 kg of the passive du/dt method filter. Silicon carbide freewheeling diodes were found to reduce the inverter losses in the active du/dt filtering by 18% compared with the same IGBT module with silicon diodes. For a 200 m cable length, the average peak voltage at the motor terminals was 1050 V with no filter, 960 V for the all-passive du/dt filter, and 700 V for the active du/dt filtering applying the new control principle.
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Julkaisussa: Novus Atlas. Vol. I
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Julkaisussa: Speculum orbis terrae. Vol. II
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Julkaisussa: Nouvel atlas du globe terrestre representé en une carte générale et XII cartes particulières avec une courte description
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Kartta kuuluu A. E. Nordenskiöldin kokoelmaan
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Kartta kuuluu A. E. Nordenskiöldin kokoelmaan
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Kartta kuuluu A. E. Nordenskiöldin kokoelmaan
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Parallel-connected photovoltaic inverters are required in large solar plants where it is not economically or technically reasonable to use a single inverter. Currently, parallel inverters require individual isolating transformers to cut the path for the circulating current. In this doctoral dissertation, the problem is approached by attempting to minimize the generated circulating current. The circulating current is a function of the generated common-mode voltages of the parallel inverters and can be minimized by synchronizing the inverters. The synchronization has previously been achieved by a communication link. However, in photovoltaic systems the inverters may be located far apart from each other. Thus, a control free of communication is desired. It is shown in this doctoral dissertation that the circulating current can also be obtained by a common-mode voltage measurement. A control method based on a short-time switching frequency transition is developed and tested with an actual photovoltaic environment of two parallel inverters connected to two 5 kW solar arrays. Controls based on the measurement of the circulating current and the common-mode voltage are generated and tested. A communication-free method of controlling the circulating current between parallelconnected inverters is developed and verified.
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A high-frequency cyclonverter acts as a direct ac-to-ac power converter circuit that does not require a diode bidge rectifier. Bridgeless topology makes it possible to remove forward voltage drop losses that are present in a diode bridge. In addition, the on-state losses can be reduced to 1.5 times the on-state resistance of switches in half-bridge operation of the cycloconverter. A high-frequency cycloconverter is reviewed and the charging effect of the dc-capacitors in ``back-to-back'' or synchronous mode operation operation is analyzed. In addition, a control method is introduced for regulating dc-voltage of the ac-side capacitors in synchronous operation mode. The controller regulates the dc-capacitors and prevents switches from reaching overvoltage level. This can be accomplished by variating phase-shift between the upper and the lower gate signals. By adding phase-shift between the gate signal pairs, the charge stored in the energy storage capacitors can be discharged through the resonant load and substantially, the output resonant current amplitude can be improved. The above goals are analyzed and illustrated with simulation. Theory is supported with practical measurements where the proposed control method is implemented in an FPGA device and tested with a high-frequency cycloconverter using super-junction power MOSFETs as switching devices.
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Alareunassa privilegiomerkintä: Cum gratia et privil. s. r. i. vicariatq, in partibq Rheni, Sveviae, et juris Franconici.
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Jehovah auxiliante!
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Invokaatio: Sun to Theo trisbeltiso kai megiso.