Level Set Methods in Image Processing

This thesis gives an overview of the use of the level set methods in the field of image science. The similar fast marching method is discussed for comparison, also the narrow band and the particle level set methods are introduced. The level set method is a numerical scheme for representing, deforming and recovering structures in an arbitrary dimensions. It approximates and tracks the moving interfaces, dynamic curves and surfaces. The level set method does not define how and why some boundary is advancing the way it is but simply represents and tracks the boundary. The principal idea of the level set method is to represent the N dimensional boundary in the N+l dimensions. This gives the generality to represent even the complex boundaries. The level set methods can be powerful tools to represent dynamic boundaries, but they can require lot of computing power. Specially the basic level set method have considerable computational burden. This burden can be alleviated with more sophisticated versions of the level set algorithm like the narrow band level set method or with the programmable hardware implementation. Also the parallel approach can be used in suitable applications. It is concluded that these methods can be used in a quite broad range of image applications, like computer vision and graphics, scientific visualization and also to solve problems in computational physics. Level set methods and methods derived and inspired by it will be in the front line of image processing also in the future.

Sulautetun moniprosessorijärjestelmän suunnittelu sähkömoottorien ohjaus- ja valvontatarpeisiin

Universal Converter (UNICON) –projektin osana suunniteltiin sähkömoottorikäyttöjen ohjaukseen ja mittaukseen soveltuva digitaaliseen signaaliprosessoriin (DSP) pohjautuva sulautettu järjestelmä. Riittävän laskentatehon varmistamiseksi päädyttiin käyttämään moniprosessorijärjestelmää. Prosessorijärjestelmässä käytettävää DSP-piiriä valittaessa valintaperusteina olivat piirien tarjoama prosessointiteho ja moniprosessorituki. Analog Devices:n SHARC-sarjan DSP-piirit täyttivät parhaiten asetetut vaatimukset: Ne tarjoavat tehokkaan käskykannan lisäksi suuren sisäisen muistin ja sisäänrakennetun moniprosessorituen. Järjestelmän mittalaiteluonteisuudesta johtuen keskeinen suunnitteluparametri oli luoda nopeat tiedonsiirtoyhteydet mittausantureilta DSP-järjestelmään. Tämä toteutettiin käyttäen ohjelmointavia FPGA-logiikkapiirejä digitaalimuotoisen mittausdatan vastaanotossa ja esikäsittelyssä. Tiedonsiirtoyhteys PC-tietokoneelle toteutettiin käyttäen erityistä liityntäkorttia DSP-järjestelmän ja PC-tietokoneen välillä. Liityntäkortin päätehtävänä on puskuroida siirrettävä data. Järjestelyllä estetään PC-tietokoneen vaikutus DSP-järjestelmän toimintaan, jotta kyetään takaamaan järjestelmän reaaliaikainen toiminta kaikissa olosuhteissa.

The Design and Implementation of Loudspeaker Control Network Protocols

The networking and digitalization of audio equipment has created a need for control protocols. These protocols offer new services to customers and ensure that the equipment operates correctly. The control protocols used in the computer networks are not directly applicable since embedded systems have resource and cost limitations. In this master's thesis the design and implementation of new loudspeaker control network protocols are presented. The protocol stack was required to be reliable, have short response times, configure the network automatically and support the dynamic addition and removal of loudspeakers. The implemented protocol stack was also required to be as efficient and lightweight as possible because the network nodes are fairly simple and lack processing power. The protocol stack was thoroughly tested, validated and verified. The protocols were formally described using LOTOS (Language of Temporal Ordering Specifications) and verified using reachability analysis. A prototype of the loudspeaker network was built and used for testing the operation and the performance of the control protocols. The implemented control protocol stack met the design specifications and proved to be highly reliable and efficient.

Investigation of interface between Multimedia IP Network and Call Processing Server in 3G IP Telephony Core Network

The thesis presents an overview of third generation of IP telephony. The architecture of 3G IP Telephony and its components are described. The main goal of the thesis is to investigate the interface between the Call Processing Server and Multimedia IP Networks. The interface functionality, proposed protocol stack and a general description are presented in the thesis. To provide useful services, 3G IP Telephony requires a set of control protocols for connection establishment, capabilities exchange and conference control. The Session Initiation Protocol (SIP) and the H.323 are two protocols that meet these needs. In the thesis these two protocols are investigated and compared in terms of Complexity, Extensibility, Scalability, Services, Resource Utilization and Management.

Implementation of CORBA interface in a wireless device

CORBA (Common Object Request Broker Architecture) on laajalle levinnyt ja teollisuudessa yleisesti käytetty hajautetun tietojenkäsittelyn arkkitehtuuri. CORBA skaalautuu eri kokoisiin tarpeisiin ja sitä voidaan hyödynntää myös sulautetuissa langattomissa laitteissa. Oleellista sulautetussa ympäristössä on rakentaa rajapinnat kevytrakenteisiksi, pysyviksi ja helposti laajennettaviksi ilman että yhteensopivuus aikaisempiin rajapintoihin olisi vaarassa. Langattomissa laitteissa resurssit, kuten muistin määrä ja prosessointiteho, ovat hyvin rajalliset, joten rajapinta tulee suunnitella ja toteuttaa optimaalisesti. Palveluiden tulee ottaa huomioon myös langattomuuden rajoitukset, kuten hitaat tiedonsiirtonopeudet ja tiedonsiirron yhteydettömän luonteen. Työssä suunniteltiin ja toteutettiin CORBA-rajapinta GSM-päätelaitteeseen, jonka on todettu täyttävän sille asetetut tavoitteet. Rajapinta tarjoaa kaikki yleisimmät GSM-terminaalin ominaisuudet ja on laajennettavissa tulevia tuotteita ja verkkotekniikoita varten. Laajennettavuutta saavutetaan esimerkiksi kuvaamalla terminaalin ominaisuudet yleisellä kuvauskielellä, kuten XML:lla (Extensible Markup Language).

Potential Acquisition Candidates for a Supplier of Wood Processing Machinery

Diplomityön tavoitteena oli sopivimman yritysostokohteen valitseminen useiden kilpailijoiden joukosta puunkäsittelykoneiden toimittajalle. Ensin esiteltiin Suomen metsäteollisuus sekä sen osaamistarpeista noussut metsäklusteri pääosin kohdeyrityksen näkökulmasta. Seuraavaksi annettiin kuva yrityksen tuotteista, kilpailijoista ja asiakkaista. Yritysostoprosessi kuvattiin sekä esille tuotiin yleiset motiivit ja kriittiset menestystekijät. Lisäksi kuvattiin kilpailijoiden ja liiketoimintaympäristön analysointi yrityksen menestyksen edellytyksenä. Puuntyöstökoneiden markkinat segmentoitiin ja analysoitiin vuodesta 1990 aina tähän päivään asti, jotta löydettäisiin kehityskelpoiset osa-alueet eli alueet, joissa yrityksen markkinaosuutta voitaisiin kasvattaa. Kandidaattien ominaisuuksia verrattiin yritysoston motiiveihin. Yritysten tuotteet sekä maantieteellinen sijainti pisteytettiin, jotta sopivimmat yritykset nousisivat esille. Kolme yritystä valittiin syvällisempään tarkasteluun. Yritysten tuotteita, taloudellista asemaa ja globaalia verkostoa vertailtiin keskenään muiden tekijöiden, kuten maailmantalouden ohessa. Taloudellisesti vakaa ja teknisesti monipuolinen yritys kohtasi yritysoston motiivit parhaiten. Kohteen positiivisia puolia olivat sijainti, tuotteet ja palvelut. Lisäksi, yritys sopii ostajan strategiaan sekä auttaa kohtaamaan asiakkaiden nykyiset ja tulevat tarpeet.

Protocol Specific Embedded Operating System

Sulautettujen järjestelmien määrä kuten niiden sisältämä älykkyyskin ovat viime vuosina kasvaneet merkittävästi. Sulautettujen ohjelmistojen yleistymistä ja monipuolistumista on edesauttanut sulautettujen laitteistojen prosessointitehon merkittävä kehittyminen, jonka myötä entistä vaativampien ohjelmistojen totetuttaminen sulautetusti on mahdollistunut. Seuraavana sulautettujen järjestelmien kehitysaskeleena on nähtävissä järjestelmien kommunikointikyvyn paraneminen ja siten uusien ja uudentyyppisten sulautettujen ratkaisujen toteuttaminen. VTT on päättänyt tutkia sulautettujen järjestelmien kommunikointia ja kehittää sulautettun protokolla-alustan. Tutkimuksen perusta on CVOPS protokollajärjestelmä, jota jatkokehittämällä pyritään toteuttamaan sulautettu protokollajärjestelmä, µCVOPS. Tässä diplomityössä esitetään kommunikaation sulautetulle järjestelmälle asettamia vaatimuksia, järjestelmän suunnittelu ja prototyypitys sulautetulla laitteistolla. Prototyypitykseen on käytetty sulautettua DragonBall mikrokontrolleria jonka käyttöjärjestelmänä käytettiin sulautettua Linux:a. Tälle alustalle on tehty CVOPS:sta modifioitu versio, jolla µCVOPS:ia pystytään simuloimaan.

A System-Level Simulation Model for a Protocol Processor

As the development of integrated circuit technology continues to follow Moore’s law the complexity of circuits increases exponentially. Traditional hardware description languages such as VHDL and Verilog are no longer powerful enough to cope with this level of complexity and do not provide facilities for hardware/software codesign. Languages such as SystemC are intended to solve these problems by combining the powerful expression of high level programming languages and hardware oriented facilities of hardware description languages. To fully replace older languages in the desing flow of digital systems SystemC should also be synthesizable. The devices required by modern high speed networks often share the same tight constraints for e.g. size, power consumption and price with embedded systems but have also very demanding real time and quality of service requirements that are difficult to satisfy with general purpose processors. Dedicated hardware blocks of an application specific instruction set processor are one way to combine fast processing speed, energy efficiency, flexibility and relatively low time-to-market. Common features can be identified in the network processing domain making it possible to develop specialized but configurable processor architectures. One such architecture is the TACO which is based on transport triggered architecture. The architecture offers a high degree of parallelism and modularity and greatly simplified instruction decoding. For this M.Sc.(Tech) thesis, a simulation environment for the TACO architecture was developed with SystemC 2.2 using an old version written with SystemC 1.0 as a starting point. The environment enables rapid design space exploration by providing facilities for hw/sw codesign and simulation and an extendable library of automatically configured reusable hardware blocks. Other topics that are covered are the differences between SystemC 1.0 and 2.2 from the viewpoint of hardware modeling, and compilation of a SystemC model into synthesizable VHDL with Celoxica Agility SystemC Compiler. A simulation model for a processor for TCP/IP packet validation was designed and tested as a test case for the environment.

A Co-Processor Approach for Efficient Java Execution in Embedded Systems

This thesis deals with a hardware accelerated Java virtual machine, named REALJava. The REALJava virtual machine is targeted for resource constrained embedded systems. The goal is to attain increased computational performance with reduced power consumption. While these objectives are often seen as trade-offs, in this context both of them can be attained simultaneously by using dedicated hardware. The target level of the computational performance of the REALJava virtual machine is initially set to be as fast as the currently available full custom ASIC Java processors. As a secondary goal all of the components of the virtual machine are designed so that the resulting system can be scaled to support multiple co-processor cores. The virtual machine is designed using the hardware/software co-design paradigm. The partitioning between the two domains is flexible, allowing customizations to the resulting system, for instance the floating point support can be omitted from the hardware in order to decrease the size of the co-processor core. The communication between the hardware and the software domains is encapsulated into modules. This allows the REALJava virtual machine to be easily integrated into any system, simply by redesigning the communication modules. Besides the virtual machine and the related co-processor architecture, several performance enhancing techniques are presented. These include techniques related to instruction folding, stack handling, method invocation, constant loading and control in time domain. The REALJava virtual machine is prototyped using three different FPGA platforms. The original pipeline structure is modified to suit the FPGA environment. The performance of the resulting Java virtual machine is evaluated against existing Java solutions in the embedded systems field. The results show that the goals are attained, both in terms of computational performance and power consumption. Especially the computational performance is evaluated thoroughly, and the results show that the REALJava is more than twice as fast as the fastest full custom ASIC Java processor. In addition to standard Java virtual machine benchmarks, several new Java applications are designed to both verify the results and broaden the spectrum of the tests.

Conceptual Design of Embedded Weather Display

The objective of this thesis work is to describe the Conceptual Design process of an embedded electronic display device. The work presents the following sub processes: definition of device specifications, introduction to the technological alternatives for system components and their comparison, comparative photometric measurements of selected display panels, and the design and building of a functional concept prototype. This work focuses mainly on electronics design, albeit the mechanical issues and fields of the software architecture that significantly affect the decisions are also discussed when necessary. The VESA Flat Panel Display Measurement (FPDM) 2.0 Standard was applied to the appropriate extent into photometric measurements. The results were analyzed against the requirement standards of a customer-specific display development project. An Active Matrix LCD was selected as the display of concept prototype, but also the excellent visual characteristics of Active Matrix OLED technology were noted. Should the reliability of the OLED products be significantly improved in the future, utilizing such products in the described application must be reconsidered.

Identification of the Emerging Issues in Recycled Fiber Processing

The objectives of this research work “Identification of the Emerging Issues in Recycled Fiber processing” are discovering of emerging research issues and presenting of new approaches to identify promising research themes in recovered paper application and production. The projected approach consists of identifying technological problems often encountered in wastepaper preparation processes and also improving the quality of recovered paper and increasing its proportion in the composition of paper and board. The source of information for the problem retrieval is scientific publications in which waste paper application and production were discussed. The study has exploited several research methods to understand the changes related to utilization of recovered paper. The all assembled data was carefully studied and categorized by applying software called RefViz and CiteSpace. Suggestions were made on the various classes of these problems that need further investigation in order to propose an emerging research trends in recovered paper.

Customer knowledge processing in key account management

The ability of the supplier firm to generate and utilise customer-specific knowledge has attracted increasing attention in the academic literature during the last decade. It has been argued the customer knowledge should treated as a strategic asset the same as any other intangible assets. Yet, at the same time it has been shown that the management of customer-specific knowledge is challenging in practice, and that many firms are better at acquiring customer knowledge than at making use of it. This study examines customer knowledge processing in the context of key account management in large industrial firms. This focus was chosen because key accounts are demanding and complex. It is not unusual for a single key account relationship to constitute a complex web of relationships between the supplier and the key account – thus easily leading to the dispersion of customer-specific knowledge in the supplier firm. Although the importance of customer-specific knowledge generation has been widely acknowledged in the literature, surprisingly little attention has been paid to the processes through which firms generate, disseminate and use such knowledge internally for enhancing the relationships with their major, strategically important key account customers. This thesis consists of two parts. The first part comprises a theoretical overview and draws together the main findings of the study, whereas the second part consists of five complementary empirical research papers based on survey data gathered from large industrial firms in Finland. The findings suggest that the management of customer knowledge generated about and form key accounts is a three-dimensional process consisting of acquisition, dissemination and utilization. It could be concluded from the results that customer-specific knowledge is a strategic asset because the supplier’s customer knowledge processing activities have a positive effect on supplier’s key account performance. Moreover, in examining the determinants of each phase separately the study identifies a number of intra-organisational factors that facilitate the process in supplier firms. The main contribution of the thesis lies in linking the concept of customer knowledge processing to the previous literature on key account management. Moreover, given than this literature is mainly conceptual or case-based, a further contribution is to examine its consequences and determinants based on quantitative empirical data.

Embedded controller system in crane application

The thesis studies possibility of using embedded controller in a crane application and furthermore defines requirements when designing such a controller. Basic crane control architectures are considered and compared. Then embedded controller product life cycle is described: considering such issues like microcontroller selection, software/hardware design and application development tools. Finally, available embedded controller is described and used for implementing crane control.