Er-Coupled Si Nanocluster Waveguide

Rib-loaded waveguides containing Er3+-coupled Si nanoclusters (Si-nc) have been produced to observe optical gain at 1535 nm. The presence ofSi-nc strongly improves the efficiency ofEr 3+ excitation but may introduce optical loss mechanisms, such as Mie scattering and confined carrier absorption. Losses strongly affect the possibility of obtaining positive optical gain. Si-nc-related losses have been minimized to 1 dB/cm by lowering the annealing time ofthe Er3+-doped silicon-rich oxide deposited by reactive magnetron cosputtering. Photoluminescence (PL) and lifetime measurements show that all Er3+ ions are optically active while those that can be excited at high pump rates via Si-nc are only a small percentage. Er3+ absorption cross section is found comparable to that ofEr 3+ in SiO 2.However, dependence on the effective refractive index has been found. In pump-probe measurements, it is shown how the detrimental role ofconfined carrier absorption can be attenuated by reducing the annealing time. A maximum signal enhancement ofabout 1.34 at 1535 nm was measured.

Low temperature amorphous and nanocrystalline silicon thin film transistors deposited by Hot-Wire CVD on glass substrate

Amorphous and nanocrystalline silicon films obtained by Hot-Wire Chemical Vapor Deposition have been incorporated as active layers in n-type coplanar top gate thin film transistors deposited on glass substrates covered with SiO 2. Amorphous silicon devices exhibited mobility values of 1.3 cm 2 V - 1 s - 1, which are very high taking into account the amorphous nature of the material. Nanocrystalline transistors presented mobility values as high as 11.5 cm 2 V - 1 s - 1 and resulted in low threshold voltage shift (∼ 0.5 V).

Top-gate microcrystalline silicon TFTs processed at low temperature (<200ºC)

N-type as well P-type top-gate microcrystalline silicon thin film transistors (TFTs) are fabricated on glass substrates at a maximum temperature of 200 °C. The active layer is an undoped μc-Si film, 200 nm thick, deposited by Hot-Wire Chemical Vapor. The drain and source regions are highly phosphorus (N-type TFTs) or boron (P-type TFTs)-doped μc-films deposited by HW-CVD. The gate insulator is a silicon dioxide film deposited by RF sputtering. Al-SiO 2-N type c-Si structures using this insulator present low flat-band voltage,-0.2 V, and low density of states at the interface D it=6.4×10 10 eV -1 cm -2. High field effect mobility, 25 cm 2/V s for electrons and 1.1 cm 2/V s for holes, is obtained. These values are very high, particularly the hole mobility that was never reached previously.