Voltage fluctuations in IC power supply distribution

The supply voltage decrease and powerconsumption increase of modern ICs made the requirements for low voltage fluctuation caused by packaging and on-chip parasitic impedances more difficult to achieve. Most of the research works on the area assume that all the nodes of the chip are fed at thesame voltage, in such a way that the main cause of disturbance or fluctuation is the parasitic impedance of packaging. In the paper an approach to analyze the effect of high and fast current demands on the on-chip power supply network. First an approach to model the entire network by considering a homogeneous conductive foil is presented. The modification of the timing parameters of flipflops caused by spatial voltage drops through the IC surface are also investigated.

Instal·lacions de baixa tensió, mesures contra incendis, climatització i qualificació energètica d’un supermercat

El present projecte pretén oferir una solució constructiva de les instal•lacions de baixa tensió, mesures contra incendis i climatització d’un supermercat i també l’obtenció d’una qualificació energètica de l’establiment. Aquesta activitat terciari d’ús comercial és classifica com un comerç al detall amb predomini de productes alimentaris, begudes i una altra àmplia gamma de mercaderies (com són els cosmètics, detergents, productes de papereria, etc.)

Document Tècnic Edificació: instal·lacions d'electricitat Baixa Tensió

El projecte es basa en una proposta de modificació d’una Norma Tecnològica d’Edificació sobre les instal•lacions elèctriques de baixa tensió del 1973, per tal de donar-li un caire més actual

Projecte d’una xarxa de distribució elèctrica de mitja tensió, centres de transformació i instal·lacions d'enllaç d’un polígon industrial

Disseny d’una xarxa de distribució d’alta tensió de tercera categoria de 25 kV subterrània, a partir d’ara mitja tensió (MT), amb deu centres de transformació i distribució de 1000 kVA cadascun. La reforma d’un centre de transformació i distribució de 630 kVA i el disseny de la xarxa de baixa tensió. Amb la finalitat de donar subministrament d’energia elèctrica a les industries d’un polígon del terme municipal de Torroella de Montgrí (GIRONA) i obtenir l’autorització administrativa per la posterior posada en servei d’aquesta instal•lació.No queda inclòs en aquest projecte la instal•lació d’enllumenat públic

Low temperature amorphous and nanocrystalline silicon thin film transistors deposited by Hot-Wire CVD on glass substrate

Amorphous and nanocrystalline silicon films obtained by Hot-Wire Chemical Vapor Deposition have been incorporated as active layers in n-type coplanar top gate thin film transistors deposited on glass substrates covered with SiO 2. Amorphous silicon devices exhibited mobility values of 1.3 cm 2 V - 1 s - 1, which are very high taking into account the amorphous nature of the material. Nanocrystalline transistors presented mobility values as high as 11.5 cm 2 V - 1 s - 1 and resulted in low threshold voltage shift (∼ 0.5 V).

Top-gate microcrystalline silicon TFTs processed at low temperature (<200ºC)

N-type as well P-type top-gate microcrystalline silicon thin film transistors (TFTs) are fabricated on glass substrates at a maximum temperature of 200 °C. The active layer is an undoped μc-Si film, 200 nm thick, deposited by Hot-Wire Chemical Vapor. The drain and source regions are highly phosphorus (N-type TFTs) or boron (P-type TFTs)-doped μc-films deposited by HW-CVD. The gate insulator is a silicon dioxide film deposited by RF sputtering. Al-SiO 2-N type c-Si structures using this insulator present low flat-band voltage,-0.2 V, and low density of states at the interface D it=6.4×10 10 eV -1 cm -2. High field effect mobility, 25 cm 2/V s for electrons and 1.1 cm 2/V s for holes, is obtained. These values are very high, particularly the hole mobility that was never reached previously.

Self-consistent theory of current and voltage noise in multimode ballistic conductors

Electron transport in a self-consistent potential along a ballistic two-terminal conductor has been investigated. We have derived general formulas which describe the nonlinear current-voltage characteristics, differential conductance, and low-frequency current and voltage noise assuming an arbitrary distribution function and correlation properties of injected electrons. The analytical results have been obtained for a wide range of biases: from equilibrium to high values beyond the linear-response regime. The particular case of a three-dimensional Fermi-Dirac injection has been analyzed. We show that the Coulomb correlations are manifested in the negative excess voltage noise, i.e., the voltage fluctuations under high-field transport conditions can be less than in equilibrium.

Readout electronics for low dark count pixel detectors based on geiger mode avalanche photodiodes fabricated in conventional CMOS technologies for future linear colliders

The high sensitivity and excellent timing accuracy of Geiger mode avalanche photodiodes makes them ideal sensors as pixel detectors for particle tracking in high energy physics experiments to be performed in future linear colliders. Nevertheless, it is well known that these sensors suffer from dark counts and afterpulsing noise, which induce false hits (indistinguishable from event detection) as well as an increase of the necessary area of the readout system. In this work, we present a comparison between APDs fabricated in a high voltage 0.35 µm and a high integration 0.13 µm commercially available CMOS technologies that has been performed to determine which of them best fits the particle collider requirements. In addition, a readout circuit that allows low noise operation is introduced. Experimental characterization of the proposed pixel is also presented in this work.