L'ocupació altimperial del solar del mercat de Santa Caterina. Un possible centre productor ceràmic

En aquest article es presenta la fase de la intervenció realitzada al mercat de Santa Caterina que es desenvolupa en l’època altimperial romana i està relacionada amb els inicis de la ciutat de Barcino. En funció de les estructures recuperades i la gran quantitat de material d’escòries ceràmiques recollides, les restes documentades s’han identificat amb una zona de producció ceràmica suburbial, on podrien produir-se tant ceràmiques comunes com recipients amfòrics. Aquests últims són els que han aportat més informació, tant per la quantitat com per la diversitat de marques recollides, que han permès ampliar el coneixement sobre les possibles produccions a la ciutat i els circuits del vi a la zona.

Caracterització hidràulica i energètica de dues bombes helicoïdals i una comporta antiretorn

Els dispositius objectes d'aquest estudi són una comporta autoretorn de pas total i tres bombes helicoïdals (un prototipus de bomba cònica, una bomba cilíndrica fixa i un prototipus de bomba cilíndrica de nivell variable). L'objectiu del document és l'avaluació hidràulica i energètica de les bombes helicoïdals i la comporta, a més de la realització d'una modelització dels quatre dispositius. D'altra banda, en el treball s'indiquen algunes propostes de millora pel disseny actual dels prototipus de bombes helicoïdals estudiades.

Compositional influence on the electrical performance of zinc indium tin oxide transparent thin-film transistors

In this work, zinc indium tin oxide layers with different compositions are used as the active layer of thin film transistors. This multicomponent transparent conductive oxide is gaining great interest due to its reduced content of the scarce indium element. Experimental data indicate that the incorporation of zinc promotes the creation of oxygen vacancies. In thin-film transistors this effect leads to a higher threshold voltage values. The field-effect mobility is also strongly degraded, probably due to coulomb scattering by ionized defects. A post deposition annealing in air reduces the density of oxygen vacancies and improves the fieldeffect mobility by orders of magnitude. Finally, the electrical characteristics of the fabricated thin-film transistors have been analyzed to estimate the density of states in the gap of the active layers. These measurements reveal a clear peak located at 0.3 eV from the conduction band edge that could be attributed to oxygen vacancies.

En el ball les emocions pesen més que la cultura

La música té el poder de fer moure persones de totes les cultures perquè utilitza els mateixos circuits neuronals que el moviment

Cap mòbil amb tecnologia led RGBW controlat per DMX

Disseny tant a nivell de hardware com de software d’un cap mòbil amb tecnologia led RGBW controlat pel protocol DMX512. Aquest projecte es limita al disseny i a la realització de tots els elements de software i hardware necessaris per crear un prototipus de cap mòbil que pugui ser controlat mitjançant el protocol DMX. Per tant, està encarat completament cap a la vessant electrònica i de programació sense fer referència als materials i elements constructius utilitzats o sobre el disseny i estètica del producte

On an asymptotic formula for the maximum voltage drop in a on-chip power distribution network

We present a new asymptotic formula for the maximum static voltage in a simplified model for on-chip power distribution networks of array bonded integrated circuits. In this model the voltage is the solution of a Poisson equation in an infinite planar domain whose boundary is an array of circular pads of radius ", and we deal with the singular limit Ɛ → 0 case. In comparison with approximations that appear in the electronic engineering literature, our formula is more complete since we have obtained terms up to order Ɛ15. A procedure will be presented to compute all the successive terms, which can be interpreted as using multipole solutions of equations involving spatial derivatives of functions. To deduce the formula we use the method of matched asymptotic expansions. Our results are completely analytical and we make an extensive use of special functions and of the Gauss constant G

Esquemes de xifrat homomòrfics per a votació electrònica

This bachelor's degree thesis deals with homomorphic public-key cryptography, or in other words cryptosystems with special addition properties. Such cryptosystems are widely used in real life situations, for instance to make electronic voting secure. In Chapter 1 a few basic algebra results and other key concepts are introduced. Chapters 2 and 3 contain the algorithms and properties of the two cryptosystems which are considered to be the best for e-voting: Paillier and Joye-Libert. The thesis is concluded in Chapter 4, by comparing running times of the two above-mentioned cryptosystems, in simulations of real-life e-voting systems, with up to tens of thousands of voters, and different levels of security. Through these simulations, we discern the situations where each of the two cryptosystems is preferable.

On the thermal noise introduced by a resistor in a circuit

Comentari sobre l'article publicat anteriorment pels mateixos autors: Vargas, M; Pallás, R; The seemingly paradoxical noise behaviour some active circuits. IEEE Transactions on Instrumentation and Measurement. 1994, vol. 43, núm. 5, p. 764-767

General electromagnetic simulation tool to predict the microwave nonlinear response of planar, arbitrarily-shaped HTS structures

This work describes a simulation tool being developed at UPC to predict the microwave nonlinear behavior of planar superconducting structures with very few restrictions on the geometry of the planar layout. The software is intended to be applicable to most structures used in planar HTS circuits, including line, patch, and quasi-lumped microstrip resonators. The tool combines Method of Moments (MoM) algorithms for general electromagnetic simulation with Harmonic Balance algorithms to take into account the nonlinearities in the HTS material. The Method of Moments code is based on discretization of the Electric Field Integral Equation in Rao, Wilton and Glisson Basis Functions. The multilayer dyadic Green's function is used with Sommerfeld integral formulation. The Harmonic Balance algorithm has been adapted to this application where the nonlinearity is distributed and where compatibility with the MoM algorithm is required. Tests of the algorithm in TM010 disk resonators agree with closed-form equations for both the fundamental and third-order intermodulation currents. Simulations of hairpin resonators show good qualitative agreement with previously published results, but it is found that a finer meshing would be necessary to get correct quantitative results. Possible improvements are suggested.

Power supply noise and logic error probability

Voltage fluctuations caused by parasitic impedances in the power supply rails of modern ICs are a major concern in nowadays ICs. The voltage fluctuations are spread out to the diverse nodes of the internal sections causing two effects: a degradation of performances mainly impacting gate delays anda noisy contamination of the quiescent levels of the logic that drives the node. Both effects are presented together, in thispaper, showing than both are a cause of errors in modern and future digital circuits. The paper groups both error mechanismsand shows how the global error rate is related with the voltage deviation and the period of the clock of the digital system.

Via-configurable transistor array: a regular design technique to improve ICs yield

Process variations are a major bottleneck for digital CMOS integrated circuits manufacturability and yield. That iswhy regular techniques with different degrees of regularity are emerging as possible solutions. Our proposal is a new regular layout design technique called Via-Configurable Transistors Array (VCTA) that pushes to the limit circuit layout regularity for devices and interconnects in order to maximize regularity benefits. VCTA is predicted to perform worse than the Standard Cell approach designs for a certain technology node but it will allow the use of a future technology on an earlier time. Ourobjective is to optimize VCTA for it to be comparable to the Standard Cell design in an older technology. Simulations for the first unoptimized version of our VCTA of delay and energy consumption for a Full Adder circuit in the 90 nm technology node are presented and also the extrapolation for Carry-RippleAdders from 4 bits to 64 bits.

Reconstruction of networks from their betweenness centrality

In this paper we study the reconstruction of a network topology from the values of its betweenness centrality, a measure of the influence of each of its nodes in the dissemination of information over the network. We consider a simple metaheuristic, simulated annealing, as the combinatorial optimization method to generate the network from the values of the betweenness centrality. We compare the performance of this technique when reconstructing different categories of networks –random, regular, small-world, scale-free and clustered–. We show that the method allows an exact reconstruction of small networks and leads to good topological approximations in the case of networks with larger orders. The method can be used to generate a quasi-optimal topology fora communication network from a list with the values of the maximum allowable traffic for each node.

Voltage fluctuations in IC power supply distribution

The supply voltage decrease and powerconsumption increase of modern ICs made the requirements for low voltage fluctuation caused by packaging and on-chip parasitic impedances more difficult to achieve. Most of the research works on the area assume that all the nodes of the chip are fed at thesame voltage, in such a way that the main cause of disturbance or fluctuation is the parasitic impedance of packaging. In the paper an approach to analyze the effect of high and fast current demands on the on-chip power supply network. First an approach to model the entire network by considering a homogeneous conductive foil is presented. The modification of the timing parameters of flipflops caused by spatial voltage drops through the IC surface are also investigated.

Disseny d’un circuit analògic reconfigurable

En l’actualitat, l’electrònica digital s’està apoderant de la majoria de camps de desenvolupament, ja que ofereix un gran ventall de possibilitats que permeten fer front a gran quantitat de problemàtiques. Poc a Poc s’ha anat prescindint el màxim possible de l’electrònica analògica i en el seu lloc s’han utilitzat sistemes microprocessats, PLDs o qualsevol altre dispositiu digital, que proporciona beneficis enlluernadors davant la fatigosa tasca d’implementar una solució analògica.Tot i aquesta tendència, és inevitable la utilització de l’electrònica analògica, ja que el mon que ens envolta és l’entorn en el que han de proporcionar servei els diferents dissenys que es realitzen, i aquest entorn no és discret sinó continu. Partint d’aquest punt ben conegut hem de ser conscients que com a mínim els filtres d’entrada i sortida de senyal juntament amb els convertidors D/A A/D mai desapareixeran.Així doncs, aquests circuits analògics, de la mateixa forma que els digitals, han de sercomprovats un cop dissenyats, és en aquest apartat on el nostre projecte desenvoluparà un paper protagonista, ja que serà la eina que ha de permetre obtenir les diferents senyals característiques d’un determinat circuit, per posteriorment realitzar els tests que determinaran si es compleix el rang de correcte funcionament, i en cas de no complir, poder concretar quin paràmetre és el causant del defecte