Equilibrium of the simultaneous etherification ofisobutene and isoamylenes with ethanol inliquid-phase

The simultaneous etherification of isobutene and isoamylenes with ethanol has been studied using macroreticu-lar acid ion-exchange resins as catalyst. Most of the experiments were carried out over Amberlyst-35. In addition,Amberlyst-15 and Purolite CT-275 were also tested. Chemical equilibrium of four chemical reactions was studied:ethyl tert-butyl ether formation, tert-amyl ethyl ether formation from isoamylenes (2-methyl-1-butene and 2-methyl-2-butene) and isomerization reaction between both isoamylenes. Equilibrium data were obtained in a batchwisestirred tank reactor operated at 2.0 MPa and within the temperature range from 323 to 353 K. Experimental molarstandard enthalpy and entropy changes of reaction were determined for each reaction. From these data, the molarenthalpy change of formation of ethyl tert-butyl ether and tert-amyl ethyl ether were estimated. Besides, the chemical equilibrium between both diisobutene dimers, 2,4,4-trimethyl-1-pentene and 2,4,4-trimethyl-2-pentene, wasevaluated. A good agreement between thermodynamic results for the simultaneous etherification carried out in thiswork and those obtained for the isolated ethyl tert-butyl ether and tert-amyl ethyl ether systems was obtained.

SAR Interferometric phase noise reduction using wavelet transform

The problem of synthetic aperture radar interferometric phase noise reduction is addressed. A new technique based on discrete wavelet transforms is presented. This technique guarantees high resolution phase estimation without using phase image segmentation. Areas containing only noise are hardly processed. Tests with synthetic and real interferograms are reported.

The maximum voltage drop in an on-chip power distribution network: analysis of square, triangular and hexagonal power pad arrangements

A mathematical model of the voltage drop which arises in on-chip power distribution networks is used to compare the maximum voltage drop in the case of different geometric arrangements of the pads supplying power to the chip. These include the square or Manhattan power pad arrangement, which currently predominates, as well as equilateral triangular and hexagonal arrangements. In agreement with the findings in the literature and with physical and SPICE models, the equilateral triangular power pad arrangement is found to minimize the maximum voltage drop. This headline finding is a consequence of relatively simple formulas for the voltage drop, with explicit error bounds, which are established using complex analysis techniques, and elliptic functions in particular.