Detectings low introgression of invasive alleles in an extensively restocked game bird

Interbreeding of two species in the wild implies introgression of alleles from one species into the other only when admixed individuals survive and successfully backcross with the parental species. Consequently, estimating the proportion of first generation hybrids in a population may not inform about the evolutionary impact of hybridization. Samples obtained over a long time span may offer a more accurate view of the spreading of introgressed alleles in a species" gene pool. Common quail (Coturnix coturnix) populations in Europe have been restocked extensively with farm quails of hybrid origin (crosses with Japanese quails, C. japonica). We genetically monitored a common quail population over 15 years to investigate whether genetic introgression is occurring and used simulations to investigate our power to detect it. Our results revealed that some introgression has occurred, but we did not observe a significant increase over time in the proportion of admixed individuals. However, simulations showed that the degree of admixture may be larger than anticipated due to the limited power of analyses over a short time span, and that observed data was compatible with a low rate of introgression, probably resulting from reduced fitness of admixed individuals. Simulations predicted this could result in extensive admixture in the near future.

A Cartan-Eilenberg approach to Homotopical Algebra

In this paper we propose an approach to homotopical algebra where the basic ingredient is a category with two classes of distinguished morphisms: strong and weak equivalences. These data determine the cofibrant objects by an extension property analogous to the classical lifting property of projective modules. We define a Cartan-Eilenberg category as a category with strong and weak equivalences such that there is an equivalence of categories between its localisation with respect to weak equivalences and the relative localisation of the subcategory of cofibrant objects with respect to strong equivalences. This equivalence of categories allows us to extend the classical theory of derived additive functors to this non additive setting. The main examples include Quillen model categories and categories of functors defined on a category endowed with a cotriple (comonad) and taking values on a category of complexes of an abelian category. In the latter case there are examples in which the class of strong equivalences is not determined by a homotopy relation. Among other applications of our theory, we establish a very general acyclic models theorem.

An energy efficient vertical handover decision algorithm

As wireless communications evolve towards heterogeneousnetworks, mobile terminals have been enabled tohandover seamlessly from one network to another. At the sametime, the continuous increase in the terminal power consumptionhas resulted in an ever-decreasing battery lifetime. To that end,the network selection is expected to play a key role on howto minimize the energy consumption, and thus to extend theterminal lifetime. Hitherto, terminals select the network thatprovides the highest received power. However, it has been provedthat this solution does not provide the highest energy efficiency.Thus, this paper proposes an energy efficient vertical handoveralgorithm that selects the most energy efficient network thatminimizes the uplink power consumption. The performance of theproposed algorithm is evaluated through extensive simulationsand it is shown to achieve high energy efficiency gains comparedto the conventional approach.

The maximum voltage drop in an on-chip power distribution network: analysis of square, triangular and hexagonal power pad arrangements

A mathematical model of the voltage drop which arises in on-chip power distribution networks is used to compare the maximum voltage drop in the case of different geometric arrangements of the pads supplying power to the chip. These include the square or Manhattan power pad arrangement, which currently predominates, as well as equilateral triangular and hexagonal arrangements. In agreement with the findings in the literature and with physical and SPICE models, the equilateral triangular power pad arrangement is found to minimize the maximum voltage drop. This headline finding is a consequence of relatively simple formulas for the voltage drop, with explicit error bounds, which are established using complex analysis techniques, and elliptic functions in particular.

SQualTrack: A Tool for Robust Fault Detection

One of the techniques used to detect faults in dynamic systems is analytical redundancy. An important difficulty in applying this technique to real systems is dealing with the uncertainties associated with the system itself and with the measurements. In this paper, this uncertainty is taken into account by the use of intervals for the parameters of the model and for the measurements. The method that is proposed in this paper checks the consistency between the system's behavior, obtained from the measurements, and the model's behavior; if they are inconsistent, then there is a fault. The problem of detecting faults is stated as a quantified real constraint satisfaction problem, which can be solved using the modal interval analysis (MIA). MIA is used because it provides powerful tools to extend the calculations over real functions to intervals. To improve the results of the detection of the faults, the simultaneous use of several sliding time windows is proposed. The result of implementing this method is semiqualitative tracking (SQualTrack), a fault-detection tool that is robust in the sense that it does not generate false alarms, i.e., if there are false alarms, they indicate either that the interval model does not represent the system adequately or that the interval measurements do not represent the true values of the variables adequately. SQualTrack is currently being used to detect faults in real processes. Some of these applications using real data have been developed within the European project advanced decision support system for chemical/petrochemical manufacturing processes and are also described in this paper

Performance evaluation of MPEG-4 Video encoder on Adres

Actualment un típic embedded system (ex. telèfon mòbil) requereix alta qualitat per portar a terme tasques com codificar/descodificar a temps real; han de consumir poc energia per funcionar hores o dies utilitzant bateries lleugeres; han de ser el suficientment flexibles per integrar múltiples aplicacions i estàndards en un sol aparell; han de ser dissenyats i verificats en un període de temps curt tot i l’augment de la complexitat. Els dissenyadors lluiten contra aquestes adversitats, que demanen noves innovacions en arquitectures i metodologies de disseny. Coarse-grained reconfigurable architectures (CGRAs) estan emergent com a candidats potencials per superar totes aquestes dificultats. Diferents tipus d’arquitectures han estat presentades en els últims anys. L’alta granularitat redueix molt el retard, l’àrea, el consum i el temps de configuració comparant amb les FPGAs. D’altra banda, en comparació amb els tradicionals processadors coarse-grained programables, els alts recursos computacionals els permet d’assolir un alt nivell de paral•lelisme i eficiència. No obstant, els CGRAs existents no estant sent aplicats principalment per les grans dificultats en la programació per arquitectures complexes. ADRES és una nova CGRA dissenyada per I’Interuniversity Micro-Electronics Center (IMEC). Combina un processador very-long instruction word (VLIW) i un coarse-grained array per tenir dues opcions diferents en un mateix dispositiu físic. Entre els seus avantatges destaquen l’alta qualitat, poca redundància en les comunicacions i la facilitat de programació. Finalment ADRES és un patró enlloc d’una arquitectura concreta. Amb l’ajuda del compilador DRESC (Dynamically Reconfigurable Embedded System Compile), és possible trobar millors arquitectures o arquitectures específiques segons l’aplicació. Aquest treball presenta la implementació d’un codificador MPEG-4 per l’ADRES. Mostra l’evolució del codi per obtenir una bona implementació per una arquitectura donada. També es presenten les característiques principals d’ADRES i el seu compilador (DRESC). Els objectius són de reduir al màxim el nombre de cicles (temps) per implementar el codificador de MPEG-4 i veure les diferents dificultats de treballar en l’entorn ADRES. Els resultats mostren que els cícles es redueixen en un 67% comparant el codi inicial i final en el mode VLIW i un 84% comparant el codi inicial en VLIW i el final en mode CGA.