Verfahren zur direkten Implementierung von Algorithmen auf Gatterebene

Bit serial, processing, digital signal processing, transmission, time division, linear programming, linear optimization

Modulation of [My]-opioid receptor signal transduction and endocytosis by ADP-ribosylation factor proteins

Magdeburg, Univ., Fak. für Naturwiss., Diss., 2010

Digital gesteuerte Stromquellen für das Lichtbogenschweißen

Digital control, power source, arc welding, process control, information management, transient behaviour, thermal impedance, simulation, duty cycle, system design

Ground penetrating radar signal processing for landmine detection

Ground penetrating radar; landmine; background clutter removal, buried targets detecting

Modular analysis of signal transduction networks

Modularity, signaling networks, sytems biology

Modeling the AppA/PpsR signal transduction system of rhodobacter sphaeroides

Magdeburg, Univ., Fak. für Naturwiss., Diss., 2012

Determination of inorganic arsenic in rice using the Wagtech Digital Arsenator

[s.c.]

Mathematical modeling and evolution of signal transduction pathways and networks

Magdeburg, Univ., Fak. für Naturwiss., Diss., 2013

Implementation of Multi-Core Processor Based on PLASMA (Most MIPS I) IP Core

Multi-core processors is a design philosophy that has become mainstream in scientific and engineering applications. Increasing performance and gate capacity of recent FPGA devices has permitted complex logic systems to be implemented on a single programmable device. By using VHDL here we present an implementation of one multi-core processor by using the PLASMA IP core based on the (most) MIPS I ISA and give an overview of the processor architecture and share theexecution results.

Assessment of the VoIP Transmission Quality over Digital Power Line Carrier Channels

This article is devoted to the research of VoIP transmission quality over Digital Power Line Carrier channels. Assessment of quality transmission is performed using E-model. Paper considers the possibility of joint using of Digital Power Line carrier equipment with different architecture in one network. As a result of the research, the rule for constructing of multi-segment Digital Power Line Carrier channels was formulated. This rule allows minimizing the transmission delay and saving frequency resources of high voltage Power Line Carrier range.

The Research of Increase of Channel Efficiency for IP Traffic Transmission over Digital Power Line Carrier Channels

This article is devoted to the research of channel efficiency for IP-traffic transmission over Digital Power Line Carrier channels. The application of serial WAN connections and header compression as methods to increase channel efficiency is considered. According to the results of the research an effective solution for network traffic transmission in DPLC networks was proposed.

New solutions for an old challenge : chances and limitations of optical, non-invasive acquisition and digital processing techniques for the age estimation of latent fingerprints

Magdeburg, Univ., Fak. für Informatik, Diss., 2014

Software for Explicitly Parallel Memory-Centric Processor Architecture

Advances in computer memory technology justify research towards new and different views on computer organization. This paper proposes a novel memory-centric computing architecture with the goal to merge memory and processing elements in order to provide better conditions for parallelization and performance. The paper introduces the architectural concepts and afterwards shows the design and implementation of a corresponding assembler and simulator.

Improved cardiac gating and patient monitoring in high field magnetic resonance imaging by means of electrocardiogram signal processing

Magdeburg, Univ., Fak. für Elektrotechnik und Informationstechnik, Diss., 2015

Efficient query processing in co-processor-accelerated databases

...Diese Dissertation zeigt, wie wir Datenbankmanagementsysteme bauen können, die heterogene Prozessoren effizient und zuverlässig zur Beschleunigung der Anfrageverarbeitung nutzen können. Daher untersuchen wir typische Entwurfsentscheidungen von coprozessorbeschleunigten Datenbankmanagementsystemen und leiten darauf aufbauend eine generische Architektur für solche Systeme ab. Unsere Untersuchungen zeigen, dass eines der wichtigsten Probleme für solche Datenbankmanagementsysteme die Entscheidung ist, welche Operatoren einer Anfrage auf welchem Prozessor ausgeführt werden sollen...