Contact processing within walking robots' design

Magdeburg, Univ., Fak. für Elektrotechnik und Informationstechnik, Diss., 2011

Ground penetrating radar signal processing for landmine detection

Ground penetrating radar; landmine; background clutter removal, buried targets detecting

Speed in early visual processing

Vision, Speed, Electroencephalogram, Gamma Band Activity

Task-dependent modulation of reward and novelty processing in human ventral striatum and midbrain

Magdeburg, Univ., Fak. für Naturwiss., Diss., 2008

Basic components of cortical processing are shared in visual and auditory modality

Magdeburg, Univ., Fak. für Naturwiss., Diss., 2009

Downstream processing of influenza whole-virions for vaccine production

Magdeburg, Univ., Fak. für Verfahrens- und Systemtechnik, Diss., 2009

Processing and properties of alumina reinforced mullite ceramics

Magdeburg, Univ., Fak. für Maschinenbau, Diss., 2013

Electrochemical high temperature membrane reactor for the processing of hydrogen-carbon monoxide gas mixtures

Magdeburg, Univ., Fak. für Verfahrens- und Systemtechnik, Diss., 2013

Data Processing at the Flaw Detector with Combined Multisector Eddy-Current Transducer

There is described data processing at the flaw detector with combined multisectional eddy-current transducer and heterofrequency magnetic field. The application of this method for detecting flaws in rods and pipes under the conditions of significant transverse displacements is described.

Efficiency Comparison of DFT/IDFT Algorithms by Evaluating Diverse Hardware Implementations

In this paper we investigate various algorithms for performing Fast Fourier Transformation (FFT)/Inverse Fast Fourier Transformation (IFFT), and proper techniques for maximizing the FFT/IFFT execution speed, such as pipelining or parallel processing, and use of memory structures with pre-computed values (look up tables -LUT) or other dedicated hardware components (usually multipliers). Furthermore, we discuss the optimal hardware architectures that best apply to various FFT/IFFT algorithms, along with their abilities to exploit parallel processing with minimal data dependences of the FFT/IFFT calculations. An interesting approach that is also considered in this paper is the application of the integrated processing-in-memory Intelligent RAM (IRAM) chip to high speed FFT/IFFT computing. The results of the assessment study emphasize that the execution speed of the FFT/IFFT algorithms is tightly connected to the capabilities of the FFT/IFFT hardware to support the provided parallelism of the given algorithm. Therefore, we suggest that the basic Discrete Fourier Transform (DFT)/Inverse Discrete Fourier Transform (IDFT) can also provide high performances, by utilizing a specialized FFT/IFFT hardware architecture that can exploit the provided parallelism of the DFT/IDF operations. The proposed improvements include simplified multiplications over symbols given in polar coordinate system, using sinе and cosine look up tables, and an approach for performing parallel addition of N input symbols.

Efficiency Comparison of DFT/IDFT Algorithms by Evaluating Diverse Hardware : Implementations,Parallelization Prospectsand Possible Improvements

In this paper we investigate various algorithms for performing Fast Fourier Transformation (FFT)/Inverse Fast Fourier Transformation (IFFT), and proper techniquesfor maximizing the FFT/IFFT execution speed, such as pipelining or parallel processing, and use of memory structures with pre-computed values (look up tables -LUT) or other dedicated hardware components (usually multipliers). Furthermore, we discuss the optimal hardware architectures that best apply to various FFT/IFFT algorithms, along with their abilities to exploit parallel processing with minimal data dependences of the FFT/IFFT calculations. An interesting approach that is also considered in this paper is the application of the integrated processing-in-memory Intelligent RAM (IRAM) chip to high speed FFT/IFFT computing. The results of the assessment study emphasize that the execution speed of the FFT/IFFT algorithms is tightly connected to the capabilities of the FFT/IFFT hardware to support the provided parallelism of the given algorithm. Therefore, we suggest that the basic Discrete Fourier Transform (DFT)/Inverse Discrete Fourier Transform (IDFT) can also provide high performances, by utilizing a specialized FFT/IFFT hardware architecture that can exploit the provided parallelism of the DFT/IDF operations. The proposed improvements include simplified multiplications over symbols given in polar coordinate system, using sinе and cosine look up tables,and an approach for performing parallel addition of N input symbols.

New solutions for an old challenge : chances and limitations of optical, non-invasive acquisition and digital processing techniques for the age estimation of latent fingerprints

Magdeburg, Univ., Fak. für Informatik, Diss., 2014

File-based post-processing of DNS results for turbulent flames using MATLAB

Magdeburg, Univ., Fak. für Verfahrens- und Systemtechnik, Diss., 2015

Improved cardiac gating and patient monitoring in high field magnetic resonance imaging by means of electrocardiogram signal processing

Magdeburg, Univ., Fak. für Elektrotechnik und Informationstechnik, Diss., 2015

Efficient query processing in co-processor-accelerated databases

...Diese Dissertation zeigt, wie wir Datenbankmanagementsysteme bauen können, die heterogene Prozessoren effizient und zuverlässig zur Beschleunigung der Anfrageverarbeitung nutzen können. Daher untersuchen wir typische Entwurfsentscheidungen von coprozessorbeschleunigten Datenbankmanagementsystemen und leiten darauf aufbauend eine generische Architektur für solche Systeme ab. Unsere Untersuchungen zeigen, dass eines der wichtigsten Probleme für solche Datenbankmanagementsysteme die Entscheidung ist, welche Operatoren einer Anfrage auf welchem Prozessor ausgeführt werden sollen...