Development and implementation of an integrated technical management system

Quality Management, Integrated Technical Management Systems, ITMS, Technical Elements, Environment, Occupational Health and safety, OH&S, Standards, ISO, General Regulations, Integration, Management Functions, Computer Centre, Suc-cess Concepts, Documentation, PCT, QMS, EMS, OH&S-MS, Portioning, Evaluation, Technical Cycle, Technical Compliance, Framework

Implementation of a unified userspace time handling library under the Linux OS

An appropriate assessment of end-to-end network performance presumes highly efficient time tracking and measurement with precise time control of the stopping and resuming of program operation. In this paper, a novel approach to solving the problems of highly efficient and precise time measurements on PC-platforms and on ARM-architectures is proposed. A new unified High Performance Timer and a corresponding software library offer a unified interface to the known time counters and automatically identify the fastest and most reliable time source, available in the user space of a computing system. The research is focused on developing an approach of unified time acquisition from the PC hardware and accordingly substituting the common way of getting the time value through Linux system calls. The presented approach provides a much faster means of obtaining the time values with a nanosecond precision than by using conventional means. Moreover, it is capable of handling the sequential time value, precise sleep functions and process resuming. This ability means the reduction of wasting computer resources during the execution of a sleeping process from 100% (busy-wait) to 1-1.5%, whereas the benefits of very accurate process resuming times on long waits are maintained.

Implementation of Multi-Core Processor Based on PLASMA (Most MIPS I) IP Core

Multi-core processors is a design philosophy that has become mainstream in scientific and engineering applications. Increasing performance and gate capacity of recent FPGA devices has permitted complex logic systems to be implemented on a single programmable device. By using VHDL here we present an implementation of one multi-core processor by using the PLASMA IP core based on the (most) MIPS I ISA and give an overview of the processor architecture and share theexecution results.

Implementation of Reed-Solomon RS (255,239) Code

In this paper the construction of Reed-Solomon RS(255,239) codeword is described and the process of coding and decoding a message is simulated and verified. RS(255,239), or its shortened version RS(224,208) is used as a coding technique in Low-Power Single Carrier (LPSC) physical layer, as described in IEEE 802.11ad standard. The encoder takes 239 8-bit information symbols, adds 16 parity symbols and constructs 255-byte codeword to be transmitted through wireless communication channel. RS(255,239) codeword is defined over Galois Field GF and is used for correcting upto 8 symbol errors. RS(255,239) code construction is fully implemented and Simulink test project is constructed for testing and analyzing purposes.

Regarding to Implementation of Genetic Algorithmsin Life Cycle Management of Electrotechnical Equipment

Genetic algorithms regarding to life cycle management of electrotechnical equipment are considered. The concept of “techno-individual” is introduced.

A Wireless Mesh Network NS-3 Simulation Model: Implementation and Performance Comparison With a Real Test-Bed

Wireless mesh networks present an attractive communication solution for various research and industrial projects. However, in many cases, the appropriate preliminary calculations which allow predicting the network behavior have to be made before the actual deployment. For such purposes, network simulation environments emulating the real network operation are often used. Within this paper, a behavior comparison of real wireless mesh network (based on 802.11s amendment) and the simulated one has been performed. The main objective of this work is to measure performance parameters of a real 802.11s wireless mesh network (average UDP throughput and average one-way delay) and compare the derived results with characteristics of a simulated wireless mesh network created with the NS-3 network simulation tool. Then, the results from both networks are compared and the corresponding conclusion is made. The corresponding results were derived from simulation model and real-worldtest-bed, showing that the behavior of both networks is similar. It confirms that the NS-3 simulation model is accurate and can be used in further research studies.

Long-term Forecasting of Frame Alignment Losses for Circuit Emulation Implementation

The article provides a method for long-term forecast of frame alignment losses based on the bit-error rate monitoring for structure-agnostic circuit emulation service over Ethernet in a mobile backhaul network. The developed method with corresponding algorithm allows to detect instants of probable frame alignment losses in a long term perspective in order to give engineering personnel extra time to take some measures aimed at losses prevention. Moreover, long-term forecast of frame alignment losses allows to make a decision about the volume of TDM data encapsulated into a circuit emulation frame in order to increase utilization of the emulated circuit. The developed long-term forecast method formalized with the corresponding algorithm is recognized as cognitive and can act as a part of network predictive monitoring system.

Practical Aspects of Genetic Algorithms’ Implementation in Life Cycle Management of Electrotechnical Equipment

Some practical aspects of Genetic algorithms’ implementation regarding to life cycle management of electrotechnical equipment are considered.