Synthesis of plantwide control strategies using mixed integer optimization

Magdeburg, Univ., Fak. für Elektrotechnik und Informationstechnik, Diss., 2012

Modeling, design, and optimization of radiofrequency micromechanical structures

Coupled Electromechanical Analysis, MEMS Modeling, MEMS, RF MEMS Switches, Defected Ground Structures, Reconfigurable Resonator

Representations of lattice point sets : theory, algorithms, applications

Magdeburg, Univ., Fak. für Mathematik, Habil.-Schr., 2006

Optimization of radial jets mixing in cross-flow of combustion chambers using computational fluid dynamics

Cross-Flow, Radial Jets Mixing, Temperature Homogenization, Optimization, Combustion Chamber, CFD

Optimization of a procedure for emergency cooling and pressure relief for reactors with exothermal processes

Passive trip system, reactor trip, runaway reaction, batch reactor

Analysis, design, optimization and realization of compact high performance printed RF filters

Magdeburg, Univ., Fak. für Elektrotechnik und Informationstechnik, Diss., 2010

Design optimization of savonius and wells turbines

Magdeburg, Univ., Fak. für Verfahrens- und Systemtechnik, Diss., 2011

Polyhedral and combinatorial aspects in optimization

Magdeburg, Univ., Fak. für Mathematik, Habil.-Schr., 2012

Optimization-based solutions to constrained trajectory-tracking and path-following problems

Magdeburg, Univ., Fak. für Elektrotechnik und Informationstechnik, Diss., 2012

Algorithmic assistance to the optimization process in vehicle routing problems

Magdeburg, Univ., Fak. für Maschinenbau, Diss., 2013

AvBandTest – a Testing Tool for Implementations of Available Band width Estimation Algorithms

This work describes a test tool that allows to make performance tests of different end-to-end available bandwidth estimation algorithms along with their different implementations. The goal of such tests is to find the best-performing algorithm and its implementation and use it in congestion control mechanism for high-performance reliable transport protocols. The main idea of this paper is to describe the options which provide available bandwidth estimation mechanism for highspeed data transport protocols and to develop basic functionality of such test tool with which it will be possible to manage entities of test application on all involved testing hosts, aided by some middleware.

Efficiency Comparison of DFT/IDFT Algorithms by Evaluating Diverse Hardware Implementations

In this paper we investigate various algorithms for performing Fast Fourier Transformation (FFT)/Inverse Fast Fourier Transformation (IFFT), and proper techniques for maximizing the FFT/IFFT execution speed, such as pipelining or parallel processing, and use of memory structures with pre-computed values (look up tables -LUT) or other dedicated hardware components (usually multipliers). Furthermore, we discuss the optimal hardware architectures that best apply to various FFT/IFFT algorithms, along with their abilities to exploit parallel processing with minimal data dependences of the FFT/IFFT calculations. An interesting approach that is also considered in this paper is the application of the integrated processing-in-memory Intelligent RAM (IRAM) chip to high speed FFT/IFFT computing. The results of the assessment study emphasize that the execution speed of the FFT/IFFT algorithms is tightly connected to the capabilities of the FFT/IFFT hardware to support the provided parallelism of the given algorithm. Therefore, we suggest that the basic Discrete Fourier Transform (DFT)/Inverse Discrete Fourier Transform (IDFT) can also provide high performances, by utilizing a specialized FFT/IFFT hardware architecture that can exploit the provided parallelism of the DFT/IDF operations. The proposed improvements include simplified multiplications over symbols given in polar coordinate system, using sinе and cosine look up tables, and an approach for performing parallel addition of N input symbols.

Efficiency Comparison of DFT/IDFT Algorithms by Evaluating Diverse Hardware : Implementations,Parallelization Prospectsand Possible Improvements

In this paper we investigate various algorithms for performing Fast Fourier Transformation (FFT)/Inverse Fast Fourier Transformation (IFFT), and proper techniquesfor maximizing the FFT/IFFT execution speed, such as pipelining or parallel processing, and use of memory structures with pre-computed values (look up tables -LUT) or other dedicated hardware components (usually multipliers). Furthermore, we discuss the optimal hardware architectures that best apply to various FFT/IFFT algorithms, along with their abilities to exploit parallel processing with minimal data dependences of the FFT/IFFT calculations. An interesting approach that is also considered in this paper is the application of the integrated processing-in-memory Intelligent RAM (IRAM) chip to high speed FFT/IFFT computing. The results of the assessment study emphasize that the execution speed of the FFT/IFFT algorithms is tightly connected to the capabilities of the FFT/IFFT hardware to support the provided parallelism of the given algorithm. Therefore, we suggest that the basic Discrete Fourier Transform (DFT)/Inverse Discrete Fourier Transform (IDFT) can also provide high performances, by utilizing a specialized FFT/IFFT hardware architecture that can exploit the provided parallelism of the DFT/IDF operations. The proposed improvements include simplified multiplications over symbols given in polar coordinate system, using sinе and cosine look up tables,and an approach for performing parallel addition of N input symbols.

Practical Aspects of Genetic Algorithms’ Implementation in Life Cycle Management of Electrotechnical Equipment

Some practical aspects of Genetic algorithms’ implementation regarding to life cycle management of electrotechnical equipment are considered.

Flow design optimization of blood pumps considering hemolysis

Magdeburg, Univ., Fak. für Verfahrens- und Systemtechnik, Diss., 2015