Discovery and visualization of interesting patterns

Die Preise für Speicherplatz fallen stetig, da verwundert es nicht, dass Unternehmen riesige Datenmengen anhäufen und sammeln. Diese immensen Datenmengen müssen jedoch mit geeigneten Methoden analysiert werden, um für das Unternehmen überlebensnotwendige Muster zu identifizieren. Solche Muster können Probleme aber auch Chancen darstellen. In jedem Fall ist es von größter Bedeutung, rechtzeitig diese Muster zu entdecken, um zeitnah reagieren zu können. Um breite Nutzerschichten anzusprechen, müssen Analysemethoden ferner einfach zu bedienen sein, sofort Rückmeldungen liefern und intuitive Visualisierungen anbieten. Ich schlage in der vorliegenden Arbeit Methoden zur Visualisierung und Filterung von Assoziationsregeln basierend auf ihren zeitlichen Änderungen vor. Ich werde lingustische Terme (die durch Fuzzymengen modelliert werden) verwenden, um die Historien von Regelbewertungsmaßen zu charakterisieren und so eine Ordnung von relevanten Regeln zu generieren. Weiterhin werde ich die vorgeschlagenen Methoden auf weitereModellarten übertragen, die Software-Plattformvorstellen, die die Analysemethoden dem Nutzer zugänglich macht und schließlich empirische Auswertungen auf Echtdaten aus Unternehmenskooperationen vorstellen, die die Wirksamkeit meiner Vorschläge belegen.

Efficiency Comparison of DFT/IDFT Algorithms by Evaluating Diverse Hardware Implementations

In this paper we investigate various algorithms for performing Fast Fourier Transformation (FFT)/Inverse Fast Fourier Transformation (IFFT), and proper techniques for maximizing the FFT/IFFT execution speed, such as pipelining or parallel processing, and use of memory structures with pre-computed values (look up tables -LUT) or other dedicated hardware components (usually multipliers). Furthermore, we discuss the optimal hardware architectures that best apply to various FFT/IFFT algorithms, along with their abilities to exploit parallel processing with minimal data dependences of the FFT/IFFT calculations. An interesting approach that is also considered in this paper is the application of the integrated processing-in-memory Intelligent RAM (IRAM) chip to high speed FFT/IFFT computing. The results of the assessment study emphasize that the execution speed of the FFT/IFFT algorithms is tightly connected to the capabilities of the FFT/IFFT hardware to support the provided parallelism of the given algorithm. Therefore, we suggest that the basic Discrete Fourier Transform (DFT)/Inverse Discrete Fourier Transform (IDFT) can also provide high performances, by utilizing a specialized FFT/IFFT hardware architecture that can exploit the provided parallelism of the DFT/IDF operations. The proposed improvements include simplified multiplications over symbols given in polar coordinate system, using sinе and cosine look up tables, and an approach for performing parallel addition of N input symbols.

Efficiency Comparison of DFT/IDFT Algorithms by Evaluating Diverse Hardware : Implementations,Parallelization Prospectsand Possible Improvements

In this paper we investigate various algorithms for performing Fast Fourier Transformation (FFT)/Inverse Fast Fourier Transformation (IFFT), and proper techniquesfor maximizing the FFT/IFFT execution speed, such as pipelining or parallel processing, and use of memory structures with pre-computed values (look up tables -LUT) or other dedicated hardware components (usually multipliers). Furthermore, we discuss the optimal hardware architectures that best apply to various FFT/IFFT algorithms, along with their abilities to exploit parallel processing with minimal data dependences of the FFT/IFFT calculations. An interesting approach that is also considered in this paper is the application of the integrated processing-in-memory Intelligent RAM (IRAM) chip to high speed FFT/IFFT computing. The results of the assessment study emphasize that the execution speed of the FFT/IFFT algorithms is tightly connected to the capabilities of the FFT/IFFT hardware to support the provided parallelism of the given algorithm. Therefore, we suggest that the basic Discrete Fourier Transform (DFT)/Inverse Discrete Fourier Transform (IDFT) can also provide high performances, by utilizing a specialized FFT/IFFT hardware architecture that can exploit the provided parallelism of the DFT/IDF operations. The proposed improvements include simplified multiplications over symbols given in polar coordinate system, using sinе and cosine look up tables,and an approach for performing parallel addition of N input symbols.