Petri nets based components within globally asynchronous locally synchronous systems

Dissertação apresentada na Faculdade de Ciências e Tecnologias da Universidade Nova de Lisboa para a obtenção do grau de Mestre em Engenharia Electrotécnica e Computadores

Petri net based development of globally-asynchronous locally-synchronous distributed embedded systems

Dissertação para obtenção do Grau de Doutor em Engenharia Electrotécnica e de Computadores

Quadrature generators based on ring oscillators and shift registers

Quadrature oscillators are key elements in modern radio frequency (RF) transceivers and very useful nowadays in wireless communications, since they can provide: low quadrature error, low phase-noise, and wide tuning range (useful to cover several bands). RC oscillators can be fully integrated without the need of external components (external high Q-inductors), optimizing area, cost, and power consumption. The conventional structure of ring oscillator offers poor frequency stability and phasenoise, low quality factor (Q), and besides being vulnerable to process, voltage and temperature (PVT) variations, its performance degrades as the frequency of operation increases. This thesis is devoted to quadrature oscillators and presents a detailed comparative study of ring oscillator and shift register (SR) approaches. It is shown that in SRs both phase-noise and phase error are reduced, while ring oscillators have the advantage of occupying less area and less consumption due to the reduced number of components in the circuit. Thus, although ring oscillators are more suitable for biomedical applications, SRs are more appropriate for wireless applications, especially when specification requirements are more stringent and demanding. The first architecture studied consists in a simple CMOS ring oscillator employing an odd number of static single-ended inverters as delay cells. Subsequently, the quadrature 4-stage ring oscillator concept is shown and post-layout simulations are presented. The 3 and 4-phase single-frequency local oscillator (LO) generators employing SRs are presented, the latter with 50% and 25% duty-cycles. The circuits operate at 600 MHz and 900 MHz, and were designed in a 130 nm standard CMOS technology with a voltage supply of 1.2 V.

Efficient middleware for database replication

Dissertação de Mestrado em Engenharia Informática

Compact SMB chromatography for binary separation

A thesis submitted for the degree of Doctor of Philosophy

New quasi-orthogonal BCH-derived sequences for CDMA applications

European Transactions on Telecommunications, vol. 18

A study on parallel versus sequential relational fuzzy clustering methods

Dissertação para obtenção do Grau de Mestre em Engenharia Informática

Variation in protein expression levels in cell populations

Dissertation presented to obtain the Ph.D degree in Systems Biology

CMOS indoor light energy harvesting system for wireless sensing applications

Dissertação para obtenção do Grau de Doutor em Engenharia Electrotécnica e de Computadores

Produção de electricidade em Portugal

In the present work we intend to do an analysis of the production of electricity in special regime in Portugal. We will focus in particular in the remuneration system through the feed-in tariffs. First, we will excurse throughout different legal diplomas that regulated the special regime in Portugal, exploring which guarantees were conferred to electricity generators throughout the years. We intend to also evaluate how the producers remunerative rights were (or not) protected in the various legislative changes. In the second part of the dissertation we will examine whether the feed-in tariffs may be considered as State aid. Due to the inclusion of the subject in EU Law, we will analyze EU regulation and case law to support our position about the Portuguese regime. Finally, and to the extent that the production of electricity in special regime has undergone several changes to its remunerative regime in the last few years, we propose to analyze more carefully the amendments in question. We will scrutinize the reasons that based the amendments in question, which are mainly based on the economic crisis suffered by the country. We will also examine how those changes may jeopardize the remunerative rights of the producers.

Analysis and implementation of a multi-ratio switched capacitor DC-DC converter for a supercapacitor power supply

An energy harvesting system requires an energy storing device to store the energy retrieved from the surrounding environment. This can either be a rechargeable battery or a supercapcitor. Due to the limited lifetime of rechargeable batteries, they need to be periodically replaced. Therefore, a supercapacitor, which has ideally a limitless number of charge/discharge cycles can be used to store the energy; however, a voltage regulator is required to obtain a constant output voltage as the supercapacitor discharges. This can be implemented by a Switched-Capacitor DC-DC converter which allows a complete integration in CMOS technology, although it requires several topologies in order to obtain a high efficiency. This thesis presents the complete analysis of four different topologies in order to determine expressions that allow to design and determine the optimum input voltage ranges for each topology. To better understand the parasitic effects, the implementation of the capacitors and the non-ideal effect of the switches, in 130 nm technology, were carefully studied. With these two analysis a multi-ratio SC DC-DC converter was designed with an output power of 2 mW, maximum efficiency of 77%, and a maximum output ripple, in the steady state, of 23 mV; for an input voltage swing of 2.3 V to 0.85 V. This proposed converter has four operation states that perform the conversion ratios of 1/2, 2/3, 1/1 and 3/2 and its clock frequency is automatically adjusted to produce a stable output voltage of 1 V. These features are implemented through two distinct controller circuits that use asynchronous time machines (ASM) to dynamically adjust the clock frequency and to select the active state of the converter. All the theoretical expressions as well as the behaviour of the whole system was verified using electrical simulations.

A public transport bus assignment problem: parallel metaheuristics assessment

Combinatorial Optimization Problems occur in a wide variety of contexts and generally are NP-hard problems. At a corporate level solving this problems is of great importance since they contribute to the optimization of operational costs. In this thesis we propose to solve the Public Transport Bus Assignment problem considering an heterogeneous fleet and line exchanges, a variant of the Multi-Depot Vehicle Scheduling Problem in which additional constraints are enforced to model a real life scenario. The number of constraints involved and the large number of variables makes impracticable solving to optimality using complete search techniques. Therefore, we explore metaheuristics, that sacrifice optimality to produce solutions in feasible time. More concretely, we focus on the development of algorithms based on a sophisticated metaheuristic, Ant-Colony Optimization (ACO), which is based on a stochastic learning mechanism. For complex problems with a considerable number of constraints, sophisticated metaheuristics may fail to produce quality solutions in a reasonable amount of time. Thus, we developed parallel shared-memory (SM) synchronous ACO algorithms, however, synchronism originates the straggler problem. Therefore, we proposed three SM asynchronous algorithms that break the original algorithm semantics and differ on the degree of concurrency allowed while manipulating the learned information. Our results show that our sequential ACO algorithms produced better solutions than a Restarts metaheuristic, the ACO algorithms were able to learn and better solutions were achieved by increasing the amount of cooperation (number of search agents). Regarding parallel algorithms, our asynchronous ACO algorithms outperformed synchronous ones in terms of speedup and solution quality, achieving speedups of 17.6x. The cooperation scheme imposed by asynchronism also achieved a better learning rate than the original one.