Digital-domain self-calibration technique for video-rate pipeline A/D converters using Gaussian white noise

Electronics Letters Vol.38, nº 19

New simple digital self-calibration technique for pipeline ADCs using the internal thermal noise

IEEE International Symposium on Circuits and Systems, pp. 232 – 235, Seattle, EUA

Low-power 6-bit 1-GS/s two-channel pipeline ADC with open-loop amplification using amplifiers with local-feedback

IEEE International Symposium on Circuits and Systems, pp. 2258 – 2261, Seattle, EUA

Design and testing of a radiation hardened 13-bit 80 MS/s pipeline ADC implemented in a 90nm standard CMOS process

Second International Workshop on Analog and Mixed Signal Integrated Circuits for Space Applications (AMICSA 2008), Sintra, Portugal, Setembro de 2008

Efficient digital self-calibration of video-rate pipeline ADCs using white gaussian noise

Proceedings of IEEE, ISCAS 2003, Vol.I, pp. 877-880

Reference-free high-speed cmos pipeline analog-to-digital converters

Submitted in partial fulfillment of the requirements for the degree of Doctor of Philosophy in Electrical and Computer Engineering of the Faculdade de Ciências e Tecnologia of Universidade Nova de Lisboa

Determination of the most suitable oil pipeline route using GIS least cost path analysis

The Keystone XL has a big role for transforming Canadian oil to the USA. The function of the pipeline is decreasing the dependency of the American oil industry on other countries and it will help to limit external debt. The proposed pipeline seeks the most suitable route which cannot damage agricultural and natural water recourses such as the Ogallala Aquifer. Using the Geographic Information System (GIS) techniques, the suggested path in this study got extremely high correct results that will help in the future to use the least cost analysis for similar studies. The route analysis contains different weighted overlay surfaces, each, was influenced by various criteria (slope, geology, population and land use). The resulted least cost path routes for each weighted overlay surface were compared with the original proposed pipeline and each displayed surface was more effective than the proposed Keystone XL pipeline.

A multiplying-by-two CMOS amplifier for high-speed ADCs based on parametric amplification

15th International Conference on Mixed Design of Integrated Circuits and Systems, pp. 177 – 180, Poznan, Polónia

Power-and-area efficient 14-bit 1.5 MSample/s two-stage algorithmic ADC based on a mismatch-insensitive MDAC

IEEE International Symposium on Circuits and Systems, pp. 220 – 223, Seattle, EUA

New low-power 1.5-bit time-interleaved MDAC based on MOS capacitor amplification

15th IEEE International Conference on Electronics, Circuits and Systems, Malta

Parametric analog signal amplification applied to nanoscale cmos wireless digital transceivers

Thesis presented in partial fulfillment of the requirements for the degree of Doctor of Philosophy in the subject of Electrical and Computer Engineering by the Universidade Nova de Lisboa,Faculdade de Ciências e Tecnologia

Establishing a high titer transient gene expression process in conditioned media for CHO-DG44 cells

Dissertação para obtenção do Grau de Mestre em Biotecnologia

Correction of spatial distortion in magnetic resonance imaging

Dissertation to Obtain the Degree of Master in Biomedical Engineering

Pipelined analog-to-digital conversion using current-mode reference shifting

Dissertação para obtenção do grau de Mestre em Engenharia Electrotécnica e de Computadores

Incremental compilation and deployment for OutSystems Platform

OutSystems Platform is used to develop, deploy, and maintain enterprise web an mobile web applications. Applications are developed through a visual domain specific language, in an integrated development environment, and compiled to a standard stack of web technologies. In the platform’s core, there is a compiler and a deployment service that transform the visual model into a running web application. As applications grow, compilation and deployment times increase as well, impacting the developer’s productivity. In the previous model, a full application was the only compilation and deployment unit. When the developer published an application, even if he only changed a very small aspect of it, the application would be fully compiled and deployed. Our goal is to reduce compilation and deployment times for the most common use case, in which the developer performs small changes to an application before compiling and deploying it. We modified the OutSystems Platform to support a new incremental compilation and deployment model that reuses previous computations as much as possible in order to improve performance. In our approach, the full application is broken down into smaller compilation and deployment units, increasing what can be cached and reused. We also observed that this finer model would benefit from a parallel execution model. Hereby, we created a task driven Scheduler that executes compilation and deployment tasks in parallel. Our benchmarks show a substantial improvement of the compilation and deployment process times for the aforementioned development scenario.