Spatiotemporal mechanisms for actomyosin ring assembly and contraction in budding yeast cell division

Dissertation presented to obtain the Ph.D degree in Molecular Medicine

Formation of a stable cyano-bridged dinuclear iron cluster following oxidation of the superoxide reductases from Treponema pallidum and Desulfovibrio vulgaris with K(3)Fe(CN)(6)

Inorg. Chem., 2003, 42 (4), pp 938–940 DOI: 10.1021/ic0262886

Activation of N2O reduction by the fully reduced micro4-sulfide bridged tetranuclear Cu Z cluster in nitrous oxide reductase

J. Am. Chem. Soc., 2003, 125 (51), pp 15708–15709 DOI: 10.1021/ja038344n

Optimization of ring oscillators

Dissertação para obtenção do Grau de Mestre em Engenharia Electrotécnica e de Computadores

Cohesion decay: quantitative analysis of partial sister chromatid cohesion

Cell division is a highly dynamic process where sister chromatids remain associated with each other from the moment of DNA replication until the later stages of mitosis, giving rise to two daughter cells with equal genomes. The “molecular glue” that links sister DNA molecules is called cohesin, a tripartite ring-like protein complex composed of two Structural Maintenance of Chromosome proteins (Smc1 and Smc3) bridged by a kleisin subunit Rad21/Scc1, that together prevent precocious sister chromatid separation. Accumulating evidence has suggested that cohesion decay may be the cause of segregation errors that underlie certain human pathologies. However it remains to be determined how much cohesin loss abolishes functional sister chromatid cohesion. To answer these questions, we have developed different experimental conditions aiming to titrate the levels of cohesin on mitotic chromosomes in a precise manner. Using these tools, we will determine the minimal amount of cohesin needed to confer functional cohesion. The approaches described here take advantage of a system in Drosophila melanogaster where the Tobacco Etch Virus (TEV) protease can cleave the Rad21 subunit of cohesin leading to precocious sister chromatid separation. Firstly, we tried to express different levels of TEV protease to obtain partial loss of cohesion. However, this approach has failed to produce systematic different levels of sister chromatid separation. Most of the work was therefore focused on a second strategy, for which we established strains with different levels of cohesin sensitive/cohesin resistant to TEV protease. Strains containing different amounts of functional cohesin (TEV resistant) were tested by in vitro cleavage and by in vivo injections in embryos for their ability to promote sister chromatid cohesion. Our results reveal that removal of half of the cohesin complexes does not impair chromosome segregation, implying that chromosome cohesion is less sensitive to cohesin amounts than previously anticipated.

8-Phase Ring oscillator for modern receivers

The evolution of receiver architectures, built in modern CMOS technologies, allows the design of high efficient receivers. A key block in modern receivers is the oscillator. The main objective of this thesis is to design a very low power and low area 8-Phase Ring Oscillator for biomedical applications (ISM and WMTS bands). Oscillators with multiphase outputs and variable duty cycles are required. In this thesis we are focused in 12.5% and 50% duty-cycles approaches. The proposed circuit uses eight inverters in a ring structure, in order to generate the output duty cycle of 50%. The duty cycle of 1/8 is achieved through the combination of the longer duty cycle signals in pairs, using, for this purpose, NAND gates. Since the general application are not only the wireless communications context, as well as industrial, scientific and medical plans, the 8-Phase Oscillator is simulated to be wideband between 100 MHz and 1 GHz, and be able to operate in the ISM bands (447 MHz-930 MHz) and WMTS (600 MHz). The circuit prototype is designed in UMC 130 nm CMOS technology. The maximum value of current drawn from a DC power source of 1.2 V, at a maximum frequency of 930 MHz achieved, is 17.54 mA. After completion of the oscillator layout studied (occupied area is 165 μm x 83 μm). Measurement results confirm the expected operating range from the simulations, and therefore, that the oscillator fulfil effectively the goals initially proposed in order to be used as Local Oscillator in RF Modern Receivers.

Quadrature generators based on ring oscillators and shift registers

Quadrature oscillators are key elements in modern radio frequency (RF) transceivers and very useful nowadays in wireless communications, since they can provide: low quadrature error, low phase-noise, and wide tuning range (useful to cover several bands). RC oscillators can be fully integrated without the need of external components (external high Q-inductors), optimizing area, cost, and power consumption. The conventional structure of ring oscillator offers poor frequency stability and phasenoise, low quality factor (Q), and besides being vulnerable to process, voltage and temperature (PVT) variations, its performance degrades as the frequency of operation increases. This thesis is devoted to quadrature oscillators and presents a detailed comparative study of ring oscillator and shift register (SR) approaches. It is shown that in SRs both phase-noise and phase error are reduced, while ring oscillators have the advantage of occupying less area and less consumption due to the reduced number of components in the circuit. Thus, although ring oscillators are more suitable for biomedical applications, SRs are more appropriate for wireless applications, especially when specification requirements are more stringent and demanding. The first architecture studied consists in a simple CMOS ring oscillator employing an odd number of static single-ended inverters as delay cells. Subsequently, the quadrature 4-stage ring oscillator concept is shown and post-layout simulations are presented. The 3 and 4-phase single-frequency local oscillator (LO) generators employing SRs are presented, the latter with 50% and 25% duty-cycles. The circuits operate at 600 MHz and 900 MHz, and were designed in a 130 nm standard CMOS technology with a voltage supply of 1.2 V.