Spatiotemporal mechanisms for actomyosin ring assembly and contraction in budding yeast cell division

Dissertation presented to obtain the Ph.D degree in Molecular Medicine

The design and use of annual budgets to cope with uncertainty

A Work Project, presented as part of the requirements for the Award of a Masters Degree in Finance from the NOVA – School of Business and Economics

Reporting earnings per share: Evidence from Portuguese annual reports

A Work Project, presented as part of the requirements for the Award of a Masters Degree in Finance from the NOVA – School of Business and Economics

Are annual budgets being abandoned by companies operating in Portugal?: Evidence from the 500 “Maiores e Melhores”

A Work Project, presented as part of the requirements for the Award of a Masters Degree in Finance from the NOVA – School of Business and Economics

Optimization of ring oscillators

Dissertação para obtenção do Grau de Mestre em Engenharia Electrotécnica e de Computadores

8-Phase Ring oscillator for modern receivers

The evolution of receiver architectures, built in modern CMOS technologies, allows the design of high efficient receivers. A key block in modern receivers is the oscillator. The main objective of this thesis is to design a very low power and low area 8-Phase Ring Oscillator for biomedical applications (ISM and WMTS bands). Oscillators with multiphase outputs and variable duty cycles are required. In this thesis we are focused in 12.5% and 50% duty-cycles approaches. The proposed circuit uses eight inverters in a ring structure, in order to generate the output duty cycle of 50%. The duty cycle of 1/8 is achieved through the combination of the longer duty cycle signals in pairs, using, for this purpose, NAND gates. Since the general application are not only the wireless communications context, as well as industrial, scientific and medical plans, the 8-Phase Oscillator is simulated to be wideband between 100 MHz and 1 GHz, and be able to operate in the ISM bands (447 MHz-930 MHz) and WMTS (600 MHz). The circuit prototype is designed in UMC 130 nm CMOS technology. The maximum value of current drawn from a DC power source of 1.2 V, at a maximum frequency of 930 MHz achieved, is 17.54 mA. After completion of the oscillator layout studied (occupied area is 165 μm x 83 μm). Measurement results confirm the expected operating range from the simulations, and therefore, that the oscillator fulfil effectively the goals initially proposed in order to be used as Local Oscillator in RF Modern Receivers.

Quadrature generators based on ring oscillators and shift registers

Quadrature oscillators are key elements in modern radio frequency (RF) transceivers and very useful nowadays in wireless communications, since they can provide: low quadrature error, low phase-noise, and wide tuning range (useful to cover several bands). RC oscillators can be fully integrated without the need of external components (external high Q-inductors), optimizing area, cost, and power consumption. The conventional structure of ring oscillator offers poor frequency stability and phasenoise, low quality factor (Q), and besides being vulnerable to process, voltage and temperature (PVT) variations, its performance degrades as the frequency of operation increases. This thesis is devoted to quadrature oscillators and presents a detailed comparative study of ring oscillator and shift register (SR) approaches. It is shown that in SRs both phase-noise and phase error are reduced, while ring oscillators have the advantage of occupying less area and less consumption due to the reduced number of components in the circuit. Thus, although ring oscillators are more suitable for biomedical applications, SRs are more appropriate for wireless applications, especially when specification requirements are more stringent and demanding. The first architecture studied consists in a simple CMOS ring oscillator employing an odd number of static single-ended inverters as delay cells. Subsequently, the quadrature 4-stage ring oscillator concept is shown and post-layout simulations are presented. The 3 and 4-phase single-frequency local oscillator (LO) generators employing SRs are presented, the latter with 50% and 25% duty-cycles. The circuits operate at 600 MHz and 900 MHz, and were designed in a 130 nm standard CMOS technology with a voltage supply of 1.2 V.

Graph usage in annual reports, evidence from Norwegian listed companies

As investors and other users of annual reports often focus their attention on graphs, it is important that they portray accurate and reliable information. However, previous studies show that graphs often distort information and mislead users. This study analyses graph usage in annual reports from the 52 most traded Norwegian companies. The findings suggest that Norwegian companies commonly use graphs, and that the graph distortions, presentational enhancement and measurement distortion, are present. No evidence of selectivity was found. This study recommends development of guidelines for graphical disclosure, and advises preparers and users of annual reports to be aware of misleading graphs.