27 resultados para critical infrastructure

em Instituto Politécnico do Porto, Portugal


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Mestrado em Engenharia Electrotécnica e de Computadores

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Dependability is a critical factor in computer systems, requiring high quality validation & verification procedures in the development stage. At the same time, digital devices are getting smaller and access to their internal signals and registers is increasingly complex, requiring innovative debugging methodologies. To address this issue, most recent microprocessors include an on-chip debug (OCD) infrastructure to facilitate common debugging operations. This paper proposes an enhanced OCD infrastructure with the objective of supporting the verification of fault-tolerant mechanisms through fault injection campaigns. This upgraded on-chip debug and fault injection (OCD-FI) infrastructure provides an efficient fault injection mechanism with improved capabilities and dynamic behavior. Preliminary results show that this solution provides flexibility in terms of fault triggering and allows high speed real-time fault injection in memory elements

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Indian Journal of Gender Studies October 2012 vol. 19 no. 3 437-467

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Mestrado em Engenharia Electrotécnica e de Computadores

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This essay intends to discuss some critical readings of fictional and theoretical texts on gender condition in Southeast Asian countries. Nowadays, many texts about women in Southeast Asia apply concepts of power in unusual areas. Traditional forms of gender hegemony have been replaced by other powerful, if somewhat more covert, forms. We will discuss some universal values concerning conventional female roles as well as the strategies used to recognize women in political fields traditionally characterized by male dominance. Female empowerment will mean different things at different times in history, as a result of culture, local geography and individual circumstances. Empowerment needs to be perceived as an individual attitude, but it also has to be facilitated at the macrolevel by society and the State. Gender is very much at the heart of all these dynamics, strongly related to specificities of historical, cultural, ethnic and class situatedness, requiring an interdisciplinary transnational approach.

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The remediation of contaminated sites supports the goal of sustainable development but may also have environmental impacts at a local, regional and global scale. Life cycle assessment (LCA) has increasingly been used in order to support site remediation decision-making. This review article discusses existing LCA methods and proposed models focusing on critical decisions and assumptions of the LCA application to site remediation activities. It is concluded that LCA has limitations as an adequate holistic decisionmaking tool since spatial and temporal differentiation of non-global impacts assessment is a major hurdle in site remediation LCA. Moreover, a consequential LCA perspective should be adopted when the different remediation services to be compared generate different site’s physical states, displacing alternative post-remediation scenarios. The environmental effects of the post-remediation stage of the site is generally disregarded in the past site remediation LCA studies and such exclusion may produce misleading conclusions and misdirected decision-making. In addition, clear guidance accepted by all stakeholders on remediation capital equipment exclusion and on dealing with multifunctional processes should be developed for site remediation LCA applications.

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The current work can be seen as a starting point for the discussion of the problematic on risk acceptance criteria in occupational environments. Some obstacles to the quantitative acceptance criteria formulation and use were analyzed. A look to the long tradition of major hazards accidents was also performed. This work shows that organizations can have several difficulties in acceptance criteria formulation and that the use of pre-defined acceptance criteria in risk assessment methodologies can be inadequate in some cases. It is urgent to define guidelines that can help organizations in the formulation of risk acceptance criteria for occupational environments.

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It is foreseen that future dependable real-time systems will also have to meet flexibility, adaptability and reconfigurability requirements. Considering the distributed nature of these computing systems, a communication infrastructure that permits to fulfil all those requirements is thus of major importance. Although Ethernet has been used primarily as an information network, there is a strong belief that some very recent technological advances will enable its use in dependable applications with real-time requirements. Indeed, several recently standardised mechanisms associated with Switched-Ethernet seem to be promising to enable communication infrastructures to support hard real-time, reliability and flexible distributed applications. This paper describes the motivation and the work being developed within the CIDER (Communication Infrastructure for Dependable Evolvable Real-Time Systems) project, which envisages the use of COTS Ethernet as an enabling technology for future dependable real-time systems. It is foreseen that the CIDER approach will constitute a relevant stream of research since it will bring together cutting edge research in the field of real-time and dependable distributed systems and the industrial eagerness to expand Ethernet responsabilities to support dependable real-time applications.

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The demonstration proposal moves from the capabilities of a wireless biometric badge [4], which integrates a localization and tracking service along with an automatic personal identification mechanism, to show how a full system architecture is devised to enable the control of physical accesses to restricted areas. The system leverages on the availability of a novel IEEE 802.15.4/Zigbee Cluster Tree network model, on enhanced security levels and on the respect of all the users' privacy issues.

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In beacon-enabled mode, IEEE 802.15.4 is ruled by the slotted CSMA/CA Medium Access Control (MAC) protocol. The standard slotted CSMA/CA mechanism does not provide any means of differentiated services to improve the quality of service for timecritical events (such as alarms, time slot reservation, PAN management messages etc.). In this paper, we present and discuss practical service differentiation mechanisms to improve the performance of slotted CSMA/CA for time-critical events, with only minor add-ons to the protocol. The contribution of our proposal is more practical than theoretical since our initial requirement is to leave the original algorithm of the slotted CSMA/CA unchanged, but rather tuning its parameters adequately according to the criticality of the messages. We present a simulation study based on an accurate model of the IEEE 802.15.4 MAC protocol, to evaluate the differentiated service strategies. Four scenarios with different settings of the slotted CSMA/CA parameters are defined. Each scenario is evaluated for FIFO and Priority Queuing. The impact of the hiddennode problem is also analyzed, and a solution to mitigate it is proposed.

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A good verification strategy should bring near the simulation and real functioning environments. In this paper we describe a system-level co-verification strategy that uses a common flow for functional simulation, timing simulation and functional debug. This last step requires using a BST infrastructure, now widely available on commercial devices, specially on FPGAs with medium/large pin-counts.

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Weblabs are spreading their influence in Science and Engineering (S&E) courses providing a way to remotely conduct real experiments. Typically, they are implemented by different architectures and infrastructures supported by Instruments and Modules (I&Ms) able to be remotely controlled and observed. Besides the inexistence of a standard solution for implementing weblabs, their reconfiguration is limited to a setup procedure that enables interconnecting a set of preselected I&Ms into an Experiment Under Test (EUT). Moreover, those I&Ms are not able to be replicated or shared by different weblab infrastructures, since they are usually based on hardware platforms. Thus, to overcome these limitations, this paper proposes a standard solution that uses I&Ms embedded into Field-Programmable Gate Array (FPGAs) devices. It is presented an architecture based on the IEEE1451.0 Std. supported by a FPGA-based weblab infrastructure able to be remotely reconfigured with I&Ms, described through standard Hardware Description Language (HDL) files, using a Reconfiguration Tool (RecTool).

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Adopting standard-based weblab infrastructures can be an added value for spreading their influence and acceptance in education. This paper suggests a solution based on the IEEE1451.0 Std. and FPGA technology for creating reconfigurable weblab infrastructures using Instruments and Modules (I&Ms) described through standard Hardware Description Language (HDL) files. It describes a methodology for creating and binding I&Ms into an IEEE1451-module embedded in a FPGA-based board able to be remotely controlled/accessed using IEEE1451-HTTP commands. At the end, an example of a step-motor controller module bond to that IEEE1451-module is described.

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Fault injection is frequently used for the verification and validation of the fault tolerant features of microprocessors. This paper proposes the modification of a common on-chip debugging (OCD) infrastructure to add fault injection capabilities and improve performance. The proposed solution imposes a very low logic overhead and provides a flexible and efficient mechanism for the execution of fault injection campaigns, being applicable to different target system architectures.