6 resultados para body-on-a chip

em Instituto Politécnico do Porto, Portugal


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A crescente evolução dos dispositivos contendo circuitos integrados, em especial os FPGAs (Field Programmable Logic Arrays) e atualmente os System on a chip (SoCs) baseados em FPGAs, juntamente com a evolução das ferramentas, tem deixado um espaço entre o lançamento e a produção de materiais didáticos que auxiliem os engenheiros no Co- Projecto de hardware/software a partir dessas tecnologias. Com o intuito de auxiliar na redução desse intervalo temporal, o presente trabalho apresenta o desenvolvimento de documentos (tutoriais) direcionados a duas tecnologias recentes: a ferramenta de desenvolvimento de hardware/software VIVADO; e o SoC Zynq-7000, Z-7010, ambos desenvolvidos pela Xilinx. Os documentos produzidos são baseados num projeto básico totalmente implementado em lógica programável e do mesmo projeto implementado através do processador programável embarcado, para que seja possível avaliar o fluxo de projeto da ferramenta para um projeto totalmente implementado em hardware e o fluxo de projeto para o mesmo projeto implementado numa estrutura de harware/software.

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Background Abdominal fat is associated with metabolic disorders, leading to cardiovascular risk factors and numerous diseases. This study aimed to analyze the effect of plaster body wrap in combination with aerobic exercise on abdominal fat. Methods Nineteen female volunteers were randomly divided into intervention group (IG; n = 10) performing aerobic exercise with plaster body wrap, and control group (CG; n = 9) performing only exercise. Subcutaneous and visceral fat were measured using ultrasound; subcutaneous fat was also estimated on analysis of skinfolds and abdominal perimeters. Results At the end of the 10-sessions protocol, the IG demonstrated a significant decrease (p ≤ 0.05) in subcutaneous fat at the left anterior superior iliac spine (ASIS) level and in iliac crest perimeter measurements. A large intervention effect size strength (0.80) was found in subcutaneous fat below the navel and a moderate effect size strength on the vertical abdominal skinfold (0.62) and the perimeter of the most prominent abdominal point (0.57). Comparing the initial and final data of each group, the IG showed a significant decrease in numerous variables including visceral and subcutaneous fat above and below the navel measured by ultrasound (p ≤ 0.05). Conclusion Plaster body wrap in combination with aerobic exercise seems to be effective for abdominal fat reduction.

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On-chip debug (OCD) features are frequently available in modern microprocessors. Their contribution to shorten the time-to-market justifies the industry investment in this area, where a number of competing or complementary proposals are available or under development, e.g. NEXUS, CJTAG, IJTAG. The controllability and observability features provided by OCD infrastructures provide a valuable toolbox that can be used well beyond the debugging arena, improving the return on investment rate by diluting its cost across a wider spectrum of application areas. This paper discusses the use of OCD features for validating fault tolerant architectures, and in particular the efficiency of various fault injection methods provided by enhanced OCD infrastructures. The reference data for our comparative study was captured on a workbench comprising the 32-bit Freescale MPC-565 microprocessor, an iSYSTEM IC3000 debugger (iTracePro version) and the Winidea 2005 debugging package. All enhanced OCD infrastructures were implemented in VHDL and the results were obtained by simulation within the same fault injection environment. The focus of this paper is on the comparative analysis of the experimental results obtained for various OCD configurations and debugging scenarios.

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The rapid increase in the use of microprocessor-based systems in critical areas, where failures imply risks to human lives, to the environment or to expensive equipment, significantly increased the need for dependable systems, able to detect, tolerate and eventually correct faults. The verification and validation of such systems is frequently performed via fault injection, using various forms and techniques. However, as electronic devices get smaller and more complex, controllability and observability issues, and sometimes real time constraints, make it harder to apply most conventional fault injection techniques. This paper proposes a fault injection environment and a scalable methodology to assist the execution of real-time fault injection campaigns, providing enhanced performance and capabilities. Our proposed solutions are based on the use of common and customized on-chip debug (OCD) mechanisms, present in many modern electronic devices, with the main objective of enabling the insertion of faults in microprocessor memory elements with minimum delay and intrusiveness. Different configurations were implemented starting from basic Components Off-The-Shelf (COTS) microprocessors, equipped with real-time OCD infrastructures, to improved solutions based on modified interfaces, and dedicated OCD circuitry that enhance fault injection capabilities and performance. All methodologies and configurations were evaluated and compared concerning performance gain and silicon overhead.

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Nowadays there is an increase of location-aware mobile applications. However, these applications only retrieve location with a mobile device's GPS chip. This means that in indoor or in more dense environments these applications don't work properly. To provide location information everywhere a pedestrian Inertial Navigation System (INS) is typically used, but these systems can have a large estimation error since, in order to turn the system wearable, they use low-cost and low-power sensors. In this work a pedestrian INS is proposed, where force sensors were included to combine with the accelerometer data in order to have a better detection of the stance phase of the human gait cycle, which leads to improvements in location estimation. Besides sensor fusion an information fusion architecture is proposed, based on the information from GPS and several inertial units placed on the pedestrian body, that will be used to learn the pedestrian gait behavior to correct, in real-time, the inertial sensors errors, thus improving location estimation.

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Mental practice is an internal reproduction of a motor act (whose intention is to promote learning and improving motor skills). Some studies have shown that other cognitive strategies also increase the strength and muscular resistance in healthy people by the enhancement of the performance during dynamic tasks. Mental training sessions may be primordial to improving muscle strength in different subjects. The aim of this study was to systematically review and meta-analiyze studies that assessed whether mental practice is effective in improving muscular strength. We conducted an electronic-computed search in Pub-Med/Medline and ISI Web of Knowledge, Scielo and manual searchs, searching papers written in English between 1991 and 2014. There were 44 studies in Pub-Med/Medline, 631 in ISI Web of Knowledge, 11 in Scielo and 3 in manual searchs databases. After exclusion of studies for duplicate, unrelated to the topic by title and summary, different samples and methodologies, a meta-analysis of 4 studies was carried out to identify the dose-response relationship. We did not find evidence that mental practice is effective in increasing strength in healthy individuals. There is no evidence that mental practice alone can be effective to induce strength gains or to optimize the training effects.