Creating shared value – a nova abordagem estratégica de Responsabilidade social empresarial

Dissertação de Mestrado apresentada ao Instituto Supeior de Contabilidade e Administração do Porto para a obtenção do grau de Mestre em Marketing Digital, sob a orientação da Doutora Sandrina Francisca Teixeira

E-Learning as a shared service in shared services centers

Book Subtitle International Conference, CENTERIS 2010, Viana do Castelo, Portugal, October 20-22, 2010, Proceedings, Part II

Response time analysis of COTS-Based multicores considering the contention on the shared memory bus

The current industry trend is towards using Commercially available Off-The-Shelf (COTS) based multicores for developing real time embedded systems, as opposed to the usage of custom-made hardware. In typical implementation of such COTS-based multicores, multiple cores access the main memory via a shared bus. This often leads to contention on this shared channel, which results in an increase of the response time of the tasks. Analyzing this increased response time, considering the contention on the shared bus, is challenging on COTS-based systems mainly because bus arbitration protocols are often undocumented and the exact instants at which the shared bus is accessed by tasks are not explicitly controlled by the operating system scheduler; they are instead a result of cache misses. This paper makes three contributions towards analyzing tasks scheduled on COTS-based multicores. Firstly, we describe a method to model the memory access patterns of a task. Secondly, we apply this model to analyze the worst case response time for a set of tasks. Although the required parameters to obtain the request profile can be obtained by static analysis, we provide an alternative method to experimentally obtain them by using performance monitoring counters (PMCs). We also compare our work against an existing approach and show that our approach outperforms it by providing tighter upper-bound on the number of bus requests generated by a task.

A 12*(1+|R|/(4m))-speed algorithm for scheduling constrained-deadline sporadic real-time tasks on a multiprocessor comprising m processors where a task may request one of |R| sequentially-reusable shared resources

We present a 12*(1+|R|/(4m))-speed algorithm for scheduling constrained-deadline sporadic real-time tasks on a multiprocessor comprising m processors where a task may request one of |R| sequentially-reusable shared resources.

Handling shared resources and precedence constraints in open systems

There is an increasing demand for highly dynamic realtime systems where several independently developed applications with different timing requirements can coexist. This paper proposes a protocol to integrate shared resources and precedence constraints among tasks in such systems assuming no precise information on critical sections and computation times is available. The concept of bandwidth inheritance is combined with a capacity sharing and stealing mechanism to efficiently exchange bandwidth among needed tasks, minimising the cost of blocking.

Shared resources and precedence constraints with capacity sharing and stealing

This paper proposes a new strategy to integrate shared resources and precedence constraints among real-time tasks, assuming no precise information on critical sections and computation times is available. The concept of bandwidth inheritance is combined with a greedy capacity sharing and stealing policy to efficiently exchange bandwidth among tasks, minimising the degree of deviation from the ideal system's behaviour caused by inter-application blocking. The proposed capacity exchange protocol (CXP) focus on exchanging extra capacities as early, and not necessarily as fairly, as possible. This loss of optimality is worth the reduced complexity as the protocol's behaviour nevertheless tends to be fair in the long run and outperforms other solutions in highly dynamic scenarios, as demonstrated by extensive simulations.

Relatório Final da Prática Educativa Supervisionada

O presente relatório de estágio foi elaborado no âmbito da unidade curricular de Integração Curricular: Prática Educativa e Relatório de Estágio, integrada no plano de estudos do 2.º ano do Mestrado em Ensino do 1.º e 2.º Ciclo, afigurando-se como um requisito fundamental para a obtenção do grau de mestre. O mesmo espelha o percurso trilhado pela professora estagiária, que atendeu a um quadro teórico-legal e a uma análise criteriosa e cuidada dos contextos educativos onde esteve inserida, permitindo-lhe aprofundar os seus saberes e agir de forma mais informada num contexto educativo de especial complexidade. A metodologia de investigação-ação palmilhou toda a prática pedagógica da formanda, através de uma espiral cíclica de observação, planificação, ação e reflexão, promotoras do desenvolvimento da profissionalidade docente. Não obstante, a supervisão apresentou-se como um momento de excelência de crescimento pessoal e profissional, uma vez que promoveu o desenvolvimento de uma postura reflexiva e autocrítica na professora estagiária, motivada por momentos de reflexão partilhada. Ao longo desta jornada foram cruciais os contributos dados pelo par pedagógico, orientadores cooperantes e supervisores institucionais, com vista ao aperfeiçoamento das práticas e à adoção de estratégias de trabalho inovadoras, assentes no modelo socio construtivista do conhecimento. A escrita deste documento encerra o ciclo de formação inicial, estando a mestranda consciente de que o processo de crescimento se irá prolongar ao longo da sua vida, de modo a desenvolver práticas mais ricas e significativas, promotoras do desenvolvimento integral e integrado dos educandos, preparando-os para a vida em sociedade. Palavras-chave: prática de ensino supervisionada; desenvolvimento profissional; reflexão; trabalho colaborativo.