CuxSnSx+1 (x = 2, 3) thin films grown by sulfurization of metallic precursors deposited by dc magnetron sputtering

We report the results of the growth of Cu-Sn-S ternary chalcogenide compounds by sulfurization of dc magnetron sputtered metallic precursors. Tetragonal Cu2SnS3 forms for a maximum sulfurization temperature of 350 ºC. Cubic Cu2SnS3 is obtained at sulfurization temperatures above 400 ºC. These results are supported by XRD analysis and Raman spectroscopy measurements. The latter analysis shows peaks at 336 cm-1, 351 cm-1 for tetragonal Cu2SnS3, and 303 cm-1, 355 cm-1 for cubic Cu2SnS3. Optical analysis shows that this phase change lowers the band gap from 1.35 eV to 0.98 eV. At higher sulfurization temperatures increased loss of Sn is expected in the sulphide form. As a consequence, higher Cu content ternary compounds like Cu3SnS4 grow. In these conditions, XRD and Raman analysis only detected orthorhombic (Pmn21) phase (petrukite). This compound has Raman peaks at 318 cm-1, 348 cm-1 and 295 cm-1. For a sulfurization temperature of 450 ºC the samples present a multi-phase structure mainly composed by cubic Cu2SnS3 and orthorhombic (Pmn21) Cu3SnS4. For higher temperatures, the samples are single phase and constituted by orthorhombic (Pmn21) Cu3SnS4. Transmittance and reflectance measurements were used to estimate a band gap of 1.60 eV. For comparison we also include the results for Cu2ZnSnS4 obtained using similar growth conditions.

A framework for memory contention analysis in multi-core platforms

The last decade has witnessed a major shift towards the deployment of embedded applications on multi-core platforms. However, real-time applications have not been able to fully benefit from this transition, as the computational gains offered by multi-cores are often offset by performance degradation due to shared resources, such as main memory. To efficiently use multi-core platforms for real-time systems, it is hence essential to tightly bound the interference when accessing shared resources. Although there has been much recent work in this area, a remaining key problem is to address the diversity of memory arbiters in the analysis to make it applicable to a wide range of systems. This work handles diverse arbiters by proposing a general framework to compute the maximum interference caused by the shared memory bus and its impact on the execution time of the tasks running on the cores, considering different bus arbiters. Our novel approach clearly demarcates the arbiter-dependent and independent stages in the analysis of these upper bounds. The arbiter-dependent phase takes the arbiter and the task memory-traffic pattern as inputs and produces a model of the availability of the bus to a given task. Then, based on the availability of the bus, the arbiter-independent phase determines the worst-case request-release scenario that maximizes the interference experienced by the tasks due to the contention for the bus. We show that the framework addresses the diversity problem by applying it to a memory bus shared by a fixed-priority arbiter, a time-division multiplexing (TDM) arbiter, and an unspecified work-conserving arbiter using applications from the MediaBench test suite. We also experimentally evaluate the quality of the analysis by comparison with a state-of-the-art TDM analysis approach and consistently showing a considerable reduction in maximum interference.