11 resultados para Lab-On-a-Chip(LOC)

em Instituto Politécnico do Porto, Portugal


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A crescente evolução dos dispositivos contendo circuitos integrados, em especial os FPGAs (Field Programmable Logic Arrays) e atualmente os System on a chip (SoCs) baseados em FPGAs, juntamente com a evolução das ferramentas, tem deixado um espaço entre o lançamento e a produção de materiais didáticos que auxiliem os engenheiros no Co- Projecto de hardware/software a partir dessas tecnologias. Com o intuito de auxiliar na redução desse intervalo temporal, o presente trabalho apresenta o desenvolvimento de documentos (tutoriais) direcionados a duas tecnologias recentes: a ferramenta de desenvolvimento de hardware/software VIVADO; e o SoC Zynq-7000, Z-7010, ambos desenvolvidos pela Xilinx. Os documentos produzidos são baseados num projeto básico totalmente implementado em lógica programável e do mesmo projeto implementado através do processador programável embarcado, para que seja possível avaliar o fluxo de projeto da ferramenta para um projeto totalmente implementado em hardware e o fluxo de projeto para o mesmo projeto implementado numa estrutura de harware/software.

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Demands for functionality enhancements, cost reductions and power savings clearly suggest the introduction of multiand many-core platforms in real-time embedded systems. However, when compared to uni-core platforms, the manycores experience additional problems, namely the lack of scalable coherence mechanisms and the necessity to perform migrations. These problems have to be addressed before such systems can be considered for integration into the realtime embedded domain. We have devised several agreement protocols which solve some of the aforementioned issues. The protocols allow the applications to plan and organise their future executions both temporally and spatially (i.e. when and where the next job will be executed). Decisions can be driven by several factors, e.g. load balancing, energy savings and thermal issues. All presented protocols are analytically described, with the particular emphasis on their respective real-time behaviours and worst-case performance. The underlying assumptions are based on the multi-kernel model and the message-passing paradigm, which constitutes the communication between the interacting instances.

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On-chip debug (OCD) features are frequently available in modern microprocessors. Their contribution to shorten the time-to-market justifies the industry investment in this area, where a number of competing or complementary proposals are available or under development, e.g. NEXUS, CJTAG, IJTAG. The controllability and observability features provided by OCD infrastructures provide a valuable toolbox that can be used well beyond the debugging arena, improving the return on investment rate by diluting its cost across a wider spectrum of application areas. This paper discusses the use of OCD features for validating fault tolerant architectures, and in particular the efficiency of various fault injection methods provided by enhanced OCD infrastructures. The reference data for our comparative study was captured on a workbench comprising the 32-bit Freescale MPC-565 microprocessor, an iSYSTEM IC3000 debugger (iTracePro version) and the Winidea 2005 debugging package. All enhanced OCD infrastructures were implemented in VHDL and the results were obtained by simulation within the same fault injection environment. The focus of this paper is on the comparative analysis of the experimental results obtained for various OCD configurations and debugging scenarios.

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The rapid increase in the use of microprocessor-based systems in critical areas, where failures imply risks to human lives, to the environment or to expensive equipment, significantly increased the need for dependable systems, able to detect, tolerate and eventually correct faults. The verification and validation of such systems is frequently performed via fault injection, using various forms and techniques. However, as electronic devices get smaller and more complex, controllability and observability issues, and sometimes real time constraints, make it harder to apply most conventional fault injection techniques. This paper proposes a fault injection environment and a scalable methodology to assist the execution of real-time fault injection campaigns, providing enhanced performance and capabilities. Our proposed solutions are based on the use of common and customized on-chip debug (OCD) mechanisms, present in many modern electronic devices, with the main objective of enabling the insertion of faults in microprocessor memory elements with minimum delay and intrusiveness. Different configurations were implemented starting from basic Components Off-The-Shelf (COTS) microprocessors, equipped with real-time OCD infrastructures, to improved solutions based on modified interfaces, and dedicated OCD circuitry that enhance fault injection capabilities and performance. All methodologies and configurations were evaluated and compared concerning performance gain and silicon overhead.

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6th International Real-Time Scheduling Open Problems Seminar (RTSOPS 2015), Lund, Sweden.

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Remote experimentation laboratories are systems based on real equipment, allowing students to perform practical work through a computer connected to the internet. In engineering fields lab activities play a fundamental role. Distance learning has not demonstrated good results in engineering fields because traditional lab activities cannot be covered by this paradigm. These activities can be set for one or for a group of students who work from different locations. All these configurations lead to considering a flexible model that covers all possibilities (for an individual or a group). An inter-continental network of remote laboratories supported by both European and Latin American institutions of higher education has been formed. In this network context, a learning collaborative model for students working from different locations has been defined. The first considerations are presented.

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As electronic devices get smaller and more complex, dependability assurance is becoming fundamental for many mission critical computer based systems. This paper presents a case study on the possibility of using the on-chip debug infrastructures present in most current microprocessors to execute real time fault injection campaigns. The proposed methodology is based on a debugger customized for fault injection and designed for maximum flexibility, and consists of injecting bit-flip type faults on memory elements without modifying or halting the target application. The debugger design is easily portable and applicable to different architectures, providing a flexible and efficient mechanism for verifying and validating fault tolerant components.

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This paper describes the application of Design State Exploration techniques in the development of a remote lab for projectile motion experiments. The application was enabled by the existence of two independent teams: one composed of a series of internships that started first and another with two grantees that started a few months later. The paper presents evidence on how this approach provided gains in the development process conducted by the second team that benefited from design state exploration studies performed by the first team. This particular aspect is highlighted in relation to the work already presented in the 10th Remote Engineering and Virtual Instrumentation (REV) conference.

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This work describes the impact of different teachers’ approaches in using Moodle, for supporting their courses, at the Polytechnic of Porto - School of Engineering. The study covers five different courses, from different degrees and different years, and includes a number of Moodle resources especially supporting laboratory classes. These and other active resources are particularly analyzed in order to evaluate students’ adherence to them. One particular course includes a number of remote experiments, made available through VISIR (Virtual Instrument Systems in Reality) and directly accessible through links included in the Moodle course page. The collected data have been correlated with students’ classifications in the lab component and in the exam, each one weighting 50% of their final marks. This analysis benefited from the existence of different teachers’ approaches, which resulted in a diversity of Moodle-supported environments. Conclusions point to the existence of a positive correlation factor between the number of Moodle accesses and the final exam grade, although the quality of the resources made available by the teachers seems to be preponderant over its quantity. In addition, different students perspectives were found regarding active resources: while some seem to encourage students to participate (for instance online quiz or online reports), others, more demanding, are unable to stimulate the majority of them.

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Nowadays there is an increase of location-aware mobile applications. However, these applications only retrieve location with a mobile device's GPS chip. This means that in indoor or in more dense environments these applications don't work properly. To provide location information everywhere a pedestrian Inertial Navigation System (INS) is typically used, but these systems can have a large estimation error since, in order to turn the system wearable, they use low-cost and low-power sensors. In this work a pedestrian INS is proposed, where force sensors were included to combine with the accelerometer data in order to have a better detection of the stance phase of the human gait cycle, which leads to improvements in location estimation. Besides sensor fusion an information fusion architecture is proposed, based on the information from GPS and several inertial units placed on the pedestrian body, that will be used to learn the pedestrian gait behavior to correct, in real-time, the inertial sensors errors, thus improving location estimation.

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Os jovens ao longo do seu percurso escolar têm aspirações e expetativas elevadas quanto ao valor de empregabilidade dos diplomas a que tiveram acesso em todos os graus de ensino. Contudo, no recente contexto de crise económica, essas aspirações e expetativas socialmente nutridas pela escola e pela família têm sido em grande medida frustradas pelas crescentes dificuldades que os jovens portugueses de hoje têm vivido nos seus processos de inserção profissional. A nível individual, um jovem que passe um longo período inativo tem grandes probabilidades de sofrer de baixa autoestima, exclusão social ou de um “wage scar”, isto é, de no futuro ter um rendimento abaixo do rendimento médio de pessoas com formação e experiência equivalentes além de desenvolverem uma atitude passiva e falta de participação social, o que no longo prazo acaba por ter implicações negativas para a sociedade como um todo. Conscientes desta realidade e sabendo que as incubadoras de negócios podem transmitir confiança à comunidade financeira e apoiar as startups, promovendo uma cultura de empreendedorismo e agindo como um catalisador para o desenvolvimento de estruturas de suporte de negócios mais amplas, partimos para o estudo da incubação de negócios com o intuito de traçar um plano estratégico para a Escola Superior de Estudos Industriais e de Gestão (ESEIG) que permitisse desenvolver a cultura empreendedora da sua comunidade e por esta via dar o seu contributo para a resolução da crise económica que o país atravessa. Começamos por fazer um enquadramento teórico da incubação de negócios e rapidamente percebemos que, sendo a ESEIG uma instituição de ensino superior, era importante incluir no estudo os conceitos de empreendedorismo e inovação e perceber ao nível teórico como funciona a relação Universidade-Empresa. De seguida, fomos para o “terreno” e percebemos que a solução para este desafio passaria por capacitar os alunos da ESEIG com as competências empresariais e empreendedoras necessárias para o desenvolvimento de qualquer empreendimento autonomamente. Faltava agora perceber qual a melhor forma de concretizar este ambicioso objetivo. Após um pouco mais de estudo, percebemos que, a paixão está no centro de empreendedorismo juntamente com outras dimensões afetivas e emocionais e pode estimular a criatividade e o reconhecimento de novos padrões de informação fundamental para a descoberta e exploração de oportunidades promissoras. Por sua vez, a alegria local (escolas, cidades, regiões, países) está associada a uma maior atividade empreendedora, o humor e sentimentos positivos, bem como a satisfação de vida geram efeitos benéficos, como melhor desempenho nas tarefas e produtividade, evolução na carreira e sucesso pessoal e maior propensão para assumir riscos. Percebemos então que é necessário desenvolver uma cultura de positividade, pelo que, sugerimos a implementação do novo quadro conceptual PROSPER (Positivity; Relationships; Outcomes; Strengths; Purpose; Engagement; Resilience) que tem o potencial de ser usado como uma ferramenta organizacional para a implementação dos sete principais componentes de bem-estar. Cientes de que o objetivo final é aumentar a intenção empreendedora dos estudantes, bem como o número efetivo de empreendedores, definimos como objetivos, promover o valor do empreendedorismo na criação de oportunidades e no desenvolvimento das competências dos estudantes (Engaging), fornecer aos estudantes oportunidades de aprendizagem empresarial (Empowering) e apoiar os estudantes na criação e no desenvolvimento de negócios (Equipping). Neste sentido, sugerimos diversas ações que materializam estes objetivos. Para finalizar, utilizamos um Lean Canvas com o intuito de concretizar a nossa proposta estratégica para ESEIG, que culmina com a criação do Empowering Lab ESEIG.