Direct electroanalytical determination of fluvastatin in a pharmaceutical dosage form: batch and flow analysis

The reduction of luvastatin (FLV) at a hanging mercury-drop electrode (HMDE) was studied by square-wave adsorptive-stripping voltammetry (SWAdSV). FLV can be accumulated and reduced at the electrode, with a maximum peak current intensity at a potential of approximately 1.26V vs. AgCl=Ag, in an aqueous electrolyte solution of pH 5.25. The method shows linearity between peak current intensity and FLV concentration between 1.0 10 8 and 2.7 10 6 mol L 1. Limits of detection (LOD) and quantification (LOQ) were found to be 9.9 10 9 mol L 1 and 3.3 10 8 mol L 1, respectively. Furthermore, FLV oxidation at a glassy carbon electrode surface was used for its hydrodynamic monitoring by amperometric detection in a flow-injection system. The amperometric signal was linear with FLV concentration over the range 1.0 10 6 to 1.0 10 5 mol L 1, with an LOD of 2.4 10 7 mol L 1 and an LOQ of 8.0 10 7 mol L 1. A sample rate of 50 injections per hour was achieved. Both methods were validated and showed to be precise and accurate, being satisfactorily applied to the determination of FLV in a commercial pharmaceutical.

A comparative analysis of fault injection methods via enhanced on-chip debug infrastructures

On-chip debug (OCD) features are frequently available in modern microprocessors. Their contribution to shorten the time-to-market justifies the industry investment in this area, where a number of competing or complementary proposals are available or under development, e.g. NEXUS, CJTAG, IJTAG. The controllability and observability features provided by OCD infrastructures provide a valuable toolbox that can be used well beyond the debugging arena, improving the return on investment rate by diluting its cost across a wider spectrum of application areas. This paper discusses the use of OCD features for validating fault tolerant architectures, and in particular the efficiency of various fault injection methods provided by enhanced OCD infrastructures. The reference data for our comparative study was captured on a workbench comprising the 32-bit Freescale MPC-565 microprocessor, an iSYSTEM IC3000 debugger (iTracePro version) and the Winidea 2005 debugging package. All enhanced OCD infrastructures were implemented in VHDL and the results were obtained by simulation within the same fault injection environment. The focus of this paper is on the comparative analysis of the experimental results obtained for various OCD configurations and debugging scenarios.