Electroanalysis of urinary L-dopa using tyrosinase immobilized on gold nanoelectrode ensembles

The performance of an amperometric biosensor constructed by associating tyrosinase (Tyr) enzyme with the advantages of a 3D gold nanoelectrode ensemble (GNEE) is evaluated in a flow-injection analysis (FIA) system for the analysis of l-dopa. GNEEs were fabricated by electroless deposition of the metal within the pores of polycarbonate track-etched membranes. A simple solvent etching procedure based on the solubility of polycarbonate membranes is adopted for the fabrication of the 3D GNEE. Afterward, enzyme was immobilized onto preformed self-assembled monolayers of cysteamine on the 3D GNEEs (GNEE-Tyr) via cross-linking with glutaraldehyde. The experimental conditions of the FIA system, such as the detection potential (−0.200 V vs. Ag/AgCl) and flow rates (1.0 mL min−1) were optimized. Analytical responses for l-dopa were obtained in a wide concentration range between 1 × 10−8 mol L−1 and 1 × 10−2 mol L−1. The limit of quantification was found to be 1 × 10−8 mol L−1 with a resultant % RSD of 7.23% (n = 5). The limit of detection was found to be 1 × 10−9 mol L−1 (S/N = 3). The common interfering compounds, namely glucose (10 mmol L−1), ascorbic acid (10 mmol L−1), and urea (10 mmol L−1), were studied. The recovery of l-dopa (1 × 10−7 mol L−1) from spiked urine samples was found to be 96%. Therefore, the developed method is adequate to be applied in the clinical analysis.

Reliability and availability in reconfigurable computing: a basis for a common solution

Dynamically reconfigurable SRAM-based field-programmable gate arrays (FPGAs) enable the implementation of reconfigurable computing systems where several applications may be run simultaneously, sharing the available resources according to their own immediate functional requirements. To exclude malfunctioning due to faulty elements, the reliability of all FPGA resources must be guaranteed. Since resource allocation takes place asynchronously, an online structural test scheme is the only way of ensuring reliable system operation. On the other hand, this test scheme should not disturb the operation of the circuit, otherwise availability would be compromised. System performance is also influenced by the efficiency of the management strategies that must be able to dynamically allocate enough resources when requested by each application. As those resources are allocated and later released, many small free resource blocks are created, which are left unused due to performance and routing restrictions. To avoid wasting logic resources, the FPGA logic space must be defragmented regularly. This paper presents a non-intrusive active replication procedure that supports the proposed test methodology and the implementation of defragmentation strategies, assuring both the availability of resources and their perfect working condition, without disturbing system operation.